Magnetic domain minor loop redundancy system

Details Magnetic domain minor loop redundancy system Magnetic domain minor loop redundancy system

1975-07-10

1978-01-24

Curtis, Marshall M.

Static information storage and retrieval

Magnetic bubbles

Plural interacting paths

365 94, 365200, G11C 1908

Patent

active

040706516

ABSTRACT:
A magnetic domain memory system is provided that includes magnetic domain data chips having a major-minor loop organization wherein the system may include data chips having one or more defective minor loops. A programmable read-only memory (PROM) device is provided to permanently record locations of defective minor loops for each chip in the system. Logic circuitry is employed to inhibit transfer of magnetic domains into or out of a defective minor loop responsive to the data stored at each address location of the PROM. In one embodiment, each memory word location of the programmable read only memory denotes the number of minor loops between defective loops. In a different embodiment, each memory bit location of the programmable read only memory contains either a binary 1 or 0, depending upon whether the associated minor loop is operative or inoperative. In a further embodiment, a multiplex technique is described wherein parallel data lines provide access to a plurality of magnetic domain memory modules and a PROM is utilized to store the locations of all defective minor loops in the memory modules so as to prevent transfer of magnetic domains thereto.

REFERENCES:
patent: B499718 (1976-01-01), Archer et al.
patent: 3659275 (1972-04-01), Marshall
Dynamic Redundancy & Repair System . . .; Abrahamsen; pp. 2841-2843, IBM Tech. Discl. Bull.; vol., 17, #10; 3/75.

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