Dynamic magnetic information storage or retrieval – General processing of a digital signal – Data clocking
Reexamination Certificate
1999-11-12
2001-07-24
Faber, Alan T. (Department: 2651)
Dynamic magnetic information storage or retrieval
General processing of a digital signal
Data clocking
Reexamination Certificate
active
06266200
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a phase sync circuit, or more in particular to a magnetic disk apparatus in which the write data transfer speed is changed in accordance with the inner and outer track of a magnetic disk.
In conventional apparatuses, a phase sync circuit for generating a sync clock is normally configured of a PLL (Phase-Locked Loop). Constants indicating the responsiveness of the PLL on phase sync circuit include a characteristic frequency W
n
and an attenuation rate &xgr;. These constants are dependent on such conditions as the initial phase difference and the phase pull-in time.
The phase pull-in time changes with the data transfer speed if the pattern length is fixed, since the phase pull-in is required to be effected within a phase sync pattern. If a PLL is configured with the gain of the frequency-phase comparator plus charge pump as K
d
and the gain of a VCO (voltage-controlled oscillator) as K
o
, the characteristic frequency W
n
and the attenuation rate &xgr; are expressed as
W
n
=
K
d
·
K
o
/
C
1
ξ
=
(
C
1
+
C
2
)
·
R
·
W
n
/
2
where C
1
, C
2
and R designate capacitors and a resistor respectively making up a filter.
In a conventional phase sync circuit for the information processing system, the data transfer speed is determined uniquely for each system. Once the data transfer speed of a system is determined, therefore, it is possible to calculate the most suitable constant for a PLL and set the same constant as a fixed value.
A magnetic disk unit for the information processing system, on the other hand, generally has a fixed write data speed. In such a case, however, the limitation of the linear recording density of the magnetic disk is determined by the innermost track, the density of which is progressively decreased toward the outer track.
A conventional phase sync circuit is well known as disclosed in JP-A-63-217719.
A configuration of this phase sync circuit is shown in FIG.
22
.
The phase sync circuit comprises a phase comparator
121
for comparing an input pulse signal with the phase of the output signal of a voltage controlled oscillator, a smoothing filter
112
for smoothing the output of the phase comparator, a loop filter
113
connected to the smoothing filter, and a voltage controlled oscillator
114
controlled by the voltage generated in the loop filter.
A specific circuit configuration of the phase comparator
121
is shown in FIG.
23
.
An operation timing chart for the phase comparator
121
is shown in
FIGS. 24 and 25
.
FIG. 24
is an operation timing chart for the output signal
200
of the voltage controlled oscillator
114
, the duty factor of which is smaller than 50%, and
FIG. 25
is another timing chart for the output signal
200
, the duty factor of which is larger than 50%.
The T
c
signal becomes “H” state at the leading edge of an input pulse signal
100
, and becomes “L” state at the trailing edge of the next-arriving output signal
200
. At the same time, the T
S
signal becomes “H” state at the same edge and is reduced to “L” state at the leading edge of the output signal
200
. At the same time, the T
D
signal becomes “H” state at the same edge, and is reduced to “L” state at the trailing edge of the output signal
200
.
The difference between the pulse width of the T
C
signal and that of the T
D
signal makes up the phase difference between the input pulse signal
100
and the output signal
200
.
The smoothing filter
112
converts the phase difference into a voltage, holds the voltage at timing T
S
, and applies a current proportional to the voltage to the loop filter
113
.
FIG. 26
shows the output characteristic of the smoothing filter
112
.
The loop filter
113
includes a resistor RF and a capacitor C
F
. A loop filter having a different configuration may be used with equal effect. The current produced from the smoothing filter
112
is converted into a voltage at the loop filter
113
, and controls the voltage-controlled oscillator
114
thereby to change the frequency of the output signal
200
thereof. The operation of the phase sync circuit makes it possible for the phase of the output signal to coincide with that of the input pulse signal
100
.
SUMMARY OF THE INVENTION
In recent years, a technique has been proposed to write data with a predetermined constant linear recording density in a magnetic disk in order to improve the recording capacity of the magnetic disk across the innermost to outermost track.
Specifically, such a technique carried out by changing the write clock between inner and outer peripheries and varying the transfer speed at the same time, thereby to obtain a constant linear density.
Data is read out of such a magnetic disk at a constant rotational speed of the disk with different read data speeds. As a result, it is necessary to generate a variable clock synchronous with the read data speed.
The above-described PLL according to the prior art, it is fails to take into consideration the case in which a single system may have a plurality of data speeds, and is therefore incapable of switching the PLL characteristic in accordance with the data speed. There is a problem that a stable operation is impossible to secure for all data speeds.
On the other hand a phase comparator circuit according to the prior art is capable of producing a DC current proportional to the phase difference, thus producing a stable output signal under synchronous conditions. However, there is a problem that the characteristics of the smoothing filter, like those of the smoothing filter (
FIG. 26
) described above, very with the duty factor of the output signal
200
of the voltage-controlled oscillator
114
. The problems will be explained below with reference to FIG.
27
.
The characteristics of the smoothing filter
112
are expressed by the two equations shown below.
Gl
=
T
D
·
gm
C1
(
1
)
I
0
=
I
C
T
D
(
T
C
-
T
D
)
=
I
C
T
D
Δ
Φ
(
2
)
where Gl is a sampling servo gain affecting the transient characteristic of the smoothing filter, T
D
the pulse width of the output signal
200
, gm the mutual conductance due to a transistor M
1
and a resistor R
T
, and Cl a capacitor for an integration circuit. Character Ic designates a drain current of a transistor M
2
which provides an output current of the smoothing filter. &Dgr;&phgr; designates a phase difference between the input pulse signal
100
and the output signal
200
.
The sampling servo gain Gl is preferably the unity, and an oscillation occurs if this gain is 2 or more.
If the pulse width T
D
of the output signal fluctuates, so does the sampling servo gain Gl in proportion thereto.
Also, as shown in
FIG. 26
, the output current I
0
has the linear range and inclination thereof changed. A change in linear range reduces the capture range of the phase sync circuit, while a change in inclination results in the variation in the loop gain of the phase sync circuit.
The present invention has been developed in order to solve the aforementioned problems, and an object thereof is to provide a magnetic disk apparatus capable of stable operation against all data speeds by switching the characteristics of a phase sync circuit to the optimum conditions in accordance with the data speed.
Another object of the present invention is to provide a magnetic disk apparatus capable of stable operation without depending on the time width of the output signal of the phase sync signal.
In order to achieve the above-mentioned objects, according to a first aspect of the present invention, a phase sync circuit is configured of a plurality of circuits including storage means for storing instructions for changing the response characteristics of each circuit and means for changing the response characteristics in compliance with the instructions stored in the storage means.
According to another aspect of the present invention, there is provided a phase sync circuit comprising phase comparator means, charge pump means, filter means, voltage controlled oscillation means, st
Hase Kenichi
Hirano Akihiko
Horita Ryutaro
Kojima Shin-ichi
Miyazawa Syoichi
Antonelli Terry Stout & Kraus LLP
Faber Alan T.
Hitachi Ltd
LandOfFree
Magnetic disk storage apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Magnetic disk storage apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Magnetic disk storage apparatus will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2552530