Macrocell array having real time diagnostics

Electricity: measuring and testing – Plural – automatically sequential tests

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371 25, G01R 3128

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active

045756740

ABSTRACT:
A macrocell array is provided wherein a plurality of cells, each having a plurality of semiconductor devices interconnected for providing logic functions, are selectively interconnected to one another and to input/output pads by a plurality of horizontal and vertical routing channels in one or more metallization layers. An on-chip diagnostic circuit is provided for diagnosing a plurality of serially connected latches, or flip-flops, in real time. A first logic gate has inputs adapted to receive a data signal and a data enable signal for inputting data into the latches. A second logic gate has inputs adapted to receive a shift-data-in signal and a shift enable signal for shifting the data through the latches. A third logic gate has inputs adapted to receive a hold signal and an output of a first of the plurality of serially connected latches for capturing the states in each of the latches at a given time. A fourth logic gate has inputs adapted to receive a complement enable signal and an output of the first latch for allowing desired test data to simultaneously appear at all the latches under test.

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