Macroblock cache

Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C382S243000

Reexamination Certificate

active

07965773

ABSTRACT:
A video processing apparatus and methodology use a combination of a processor and a video decoding hardware block to decode video data by using a reference block cache memory to perform motion compensation decode operations in the video decoding hardware block. To improve the cache hit rate, each memory access for required reference block(s) is used to fetch one or more additional reference blocks which can be used to improve the cache hit rate with future motion compensation operations. Speculative fetch control logic selects the additional reference blocks by using a frequency history table to accumulate compared motion vector information for a current motion compensation block with motion vector information from previously processed motion compensation blocks.

REFERENCES:
patent: 4631750 (1986-12-01), Gabriel et al.
patent: 4930013 (1990-05-01), Leaning
patent: 5097518 (1992-03-01), Scott et al.
patent: 5251030 (1993-10-01), Tanaka
patent: 5546479 (1996-08-01), Kawanaka et al.
patent: 5699121 (1997-12-01), Zakhor et al.
patent: 5872866 (1999-02-01), Strongin et al.
patent: 5903313 (1999-05-01), Tucker et al.
patent: 5923782 (1999-07-01), Chhabra et al.
patent: 5974197 (1999-10-01), Lee et al.
patent: 6075918 (2000-06-01), Strongin et al.
patent: 6240492 (2001-05-01), Foster et al.
patent: 6259734 (2001-07-01), Boon
patent: 6314209 (2001-11-01), Kweon et al.
patent: 6348925 (2002-02-01), Potu
patent: 6360024 (2002-03-01), Tan et al.
patent: 6441754 (2002-08-01), Wang et al.
patent: 6614930 (2003-09-01), Agnihotri et al.
patent: 6859558 (2005-02-01), Hong
patent: 6859561 (2005-02-01), Mitchell et al.
patent: 7006112 (2006-02-01), Chia et al.
patent: 7162093 (2007-01-01), Regunathan et al.
patent: 2001/0005432 (2001-06-01), Takahashi et al.
patent: 2002/0071599 (2002-06-01), Herget et al.
patent: 2003/0138150 (2003-07-01), Srinivasan
patent: 2003/0158987 (2003-08-01), MacInnis et al.
patent: 2003/0206664 (2003-11-01), Gomila et al.
patent: 2004/0062307 (2004-04-01), Hallapuro et al.
patent: 2004/0213345 (2004-10-01), Holcomb et al.
patent: 2004/0213468 (2004-10-01), Lee et al.
patent: 2004/0218671 (2004-11-01), Haraguchi et al.
patent: 2005/0013494 (2005-01-01), Srinivasan et al.
patent: 2005/0031216 (2005-02-01), Kondo et al.
patent: 2005/0047666 (2005-03-01), Mitchell et al.
patent: 2005/0168470 (2005-08-01), Prabhakar et al.
patent: 2005/0259688 (2005-11-01), Gordon
patent: 2005/0259887 (2005-11-01), Hellman
patent: 2005/0281339 (2005-12-01), Song
patent: 2006/0050976 (2006-03-01), Molloy
patent: 2006/0165181 (2006-07-01), Kwan et al.
patent: 2006/0193383 (2006-08-01), Alvarez et al.
patent: 1 351 513 (2003-10-01), None
Official Communication for Chinese Patent Application No. 200680002803.4, dated Jan. 8, 2010.
International Search Report and Written Opinion of the International Searching Authority, PCT/US2006/001599, mailed May 31, 2006.
Bin Sheng et al., “A platform-based architecture of loop filter for AVS,” Signal Processing 2004, Proceedings, ICSP 'Apr. 2004 7th International Conference on Beijing, China Aug. 31-Sep. 4, 2004, Piscataway NJ, IEEE, Aug. 31, 2004, pp. 571-574.
Bin Sheng et al., “An implemented architecture of deblocking filter for H.264/AVC,” Image Processing, 2004, ICIP '04, 2004 International Conference on Singapore , Oct. 24-27, 2004, Piscataway, NJ, IEEE vol. 1, Oct. 24, 2004, 665-668.
Lee Y-L et al., “Loop filtering and post-filtering for low-bit-rates moving picture coding,” Signal Processing, Image Communication, Elsevier Science Publishers, Amsterdam, NL, vol. 16, No. 9, Jun. 2001, pp. 871-890.
Srinivasan S. et al., “Windows Media Video 9: Overview and applications,” Signal Processing, Image Communication, Elsevier Science Publishers, Amsterdam, NL, vol. 19, No. 9, Oct. 2004, pp. 851-875.
V. Venkatraman et al., “Architecture for De-Blocking Filter in H.264,” Picture Coding Symposium (PCS) San Francisco, 2004, 5 pages.
X. Sun et al., “In-Loop Deblocking Filter for Block-Based Video Coding,” International Conference on Signal Processing, vol. 1, pp. 33-36 (2002) http://research.microsoft.com/asia/dload—files/group/imedia/2002p/deblocking—icsp—02.pdf, 4 pages.
Translation of Official Communication for German Application No. 11 2006 000 270.8-55, dated Apr. 29, 2009.
International Search Report and Written Opinion of the International Searching Authority, PCT/US2006/001598, mailed May 31, 2006.
Official Communication for German Patent Application No. 11 2006 000 271.6, dated May 8, 2009.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Macroblock cache does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Macroblock cache, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Macroblock cache will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2621520

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.