MAC bus interface

Details MAC bus interface MAC bus interface

2005-11-08

2005-11-08

Ho, Duc (Department: 2665)

Multiplex communications

Data flow congestion prevention or control

Control of data admission to the network

C370S463000, C709S250000

Reexamination Certificate

active

06963535

ABSTRACT:
A Media Access Control (MAC) Bus interface definition and multiplexor scheme that may be implemented to provide chip layout-insensitive connections between a number of communication physical layer port entities and a single buffer manager or communications controller entity, utilizing a set of independent pipelined buses. The interface comprising three buses: A MAC In Data bus, a MAC Out Data bus, and a MAC Out Message bus. Each bus can operated with an independent set of timing signals to enable data transfers between a system side block and one or more network side blocks. The multiplexor scheme provides a multiplexor for each of the MAC buses, and enables a single system side block to connect to multiple network side blocks. The multiplexors may be also be cascaded.

REFERENCES:
patent: 5058114 (1991-10-01), Kuboki et al.
patent: 5459720 (1995-10-01), Iliev et al.
patent: 6424659 (2002-07-01), Viswanadham et al.
patent: 6651107 (2003-11-01), Conley et al.
patent: 6754222 (2004-06-01), Joung et al.

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