M-way N-port paged-interleaved memory system

Details M-way N-port paged-interleaved memory system M-way N-port paged-interleaved memory system

1992-05-29

1995-08-08

Robertson, David L.

Boots, shoes, and leggings

364DIG1, 3642287, 3642301, 3642427, G06F 1202

Patent

active

054407133

ABSTRACT:
The present invention is memory access system suitable for use in a computer system having M memory banks and N masters. The memory access system comprises a separate paged interleaved controller associated with each of the M memory banks. Each of the paged interleaved controllers comprises a bank arbiter and a bank controller. The bank arbiter associated with each memory bank receives requests from the N masters and subjects them to a request-halt protocol. The request-halt protocol executed by each arbiter prioritizes among a plurality of current requests by said masters for the same memory bank. Each arbiter insures that a current request generated by a master will not be granted if the master has a previous request that has not been granted by another arbiter. This insures that the requests of each master are granted in the order in which the requests are made. The request-halt protocol gives a higher priority to current requests specifying a row address which is the same as a valid row address of the previous memory request granted by the arbiter. The request-halt protocol prioritizes among current requests if there is no valid row address of a previous request or if no current request specifies a row address which is the same as the valid row address of the previously granted request.

REFERENCES:
patent: 4214304 (1980-06-01), Shimizu et al.
patent: 4858107 (1989-08-01), Fedele
patent: 4924375 (1990-05-01), Fung et al.
patent: 4928234 (1990-05-01), Kitamura et al.
patent: 5060145 (1991-10-01), Scheuneman et al.
patent: 5182801 (1993-06-01), Asfour
patent: 5214775 (1993-05-01), Yabushita et al.
patent: 5313603 (1994-05-01), Takishima

Affiliated with

Also associated with

Rating

M-way N-port paged-interleaved memory system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with M-way N-port paged-interleaved memory system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and M-way N-port paged-interleaved memory system will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-978273