Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
1999-05-17
2002-01-15
Mai, Tan V. (Department: 2121)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
C708S250000
Reexamination Certificate
active
06339781
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a circuit and method for generating an arbitrary phase shift in a pseudorandom noise code, with specific regard to codes employed in direct-sequence code division multiple access (DS-CDMA) communication systems.
Recently, DS-CDMA technology has been undergoing intensive research and development as a means of improving the spectral efficiency of mobile communication systems. DS-CDMA enables a number of transmitting stations to share the same frequency band, by coding the transmitted signals so that each signal is perceived as background noise, except by the intended receiver. Each transmitted signal is spread by use of a spreading code in the transmitter, and despread by use of the same spreading code in the receiver. Pseudorandom noise codes (PN codes) generated by the use of linear feedback shift registers are widely employed as spreading codes in DS-CDMA systems.
An N-bit linear feedback shift register can generate a bit sequence with a maximum repeating length of 2
N
−1 bits (N being a positive integer). The mathematical properties of the maximum-length sequences, referred to as M-sequences, have been extensively analyzed, and M-sequence are often used in practice. An M-sequence can itself be used as a PN code, or two M-sequences can be combined to generate a so-called Gold code. Different Gold codes are obtained by varying the phase relationship of the two M-sequences.
To obtain a desired Gold code, and for other purposes, it is often necessary to shift the phase of an M-sequence. A simple way to do this is to increase the clock rate of the linear feedback shift register and wait for the phase to advance by the desired amount. Because of the extreme length of the M-sequences used in mobile communications (more than a trillion bits in a certain common case, in which N is equal to forty-two), this method is too slow to be practical.
Another impractical method would be to store a table listing the register contents of the linear feedback shift register at each phase of the M-sequence. For the case mentioned above (N=42), such a table would have over a trillion forty-two-bit entries.
A more practical method is to calculate the register contents analytically. Calculation methods employing Galois-field arithmetic are known. These methods involve repeated matrix multiplication operations, however, which take time and require the use of a microprocessor or equivalent processor.
SUMMARY OF THE INVENTION
It is accordingly an object of the present invention to provide a simple method and circuit for producing an arbitrary phase shift in an M-sequence.
Another object is to provide a simple method and circuit for setting an M-sequence to an arbitrary phase position.
Another object is to provide a simple method and circuit for producing different pseudorandom noise codes by combining two M-sequences.
The invented M-sequence generator has a linear feedback shift register and a mask table. The mask table stores mask data corresponding to different phase shifts, preferably having sizes equal to powers of two.
A masked operation circuit performs logic operations on data read in parallel from the linear feedback shift register and mask data read from the mask table, thereby obtaining shifted state data. A control unit selects the mask data supplied to the masked operation circuit, and loads the shifted state data into the linear feedback shift register. By repeating these operations with different mask data, the control unit produces successive phase shifts that add up to an arbitrary phase shift.
REFERENCES:
patent: 5079733 (1992-01-01), Antoine et al.
patent: 5394405 (1995-02-01), Savir
patent: 6141374 (2000-10-01), Burns
patent: 6192385 (2001-02-01), Shimada
patent: 6263082 (2001-07-01), Ishimoto et al.
Frank Robert J.
Mai Tan V.
Oki Electric Industry Co. Ltd.
Sartori Michael A.
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