LSSD-testable D-type edge-trigger-operable latch with overriding

Details LSSD-testable D-type edge-trigger-operable latch with overriding LSSD-testable D-type edge-trigger-operable latch with overriding

1983-08-29

1986-04-01

Yusko, Donald J.

Communications: electrical

Continuously variable indicating

With meter reading

307272R, 307480, 371 25, 377 81, 34082502, H04Q 900

Patent

active

045801371

ABSTRACT:
A LSSD testable latch circuit apparatus is disclosed which has systems operational and LSSD testing operational modes. The apparatus is arranged with first and second groups of flip-flops, each group having three flip-flops. Control means allows for selective operation of the first group of flop-flops as a D-type edge triggered latch during the systems operational mode and of the first and second groups as a three-stage shift register during the LSSD testing operational mode. The control means also allows the D-type edge-triggered latch to have override asynchronously set and/or reset control.

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