Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Patent
1997-03-17
1999-01-19
Saadat, Mahshid D.
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
257693, 257703, 257700, 361748, 361749, 361750, H01L 2348, H01L 23053, H01L 2310, H01L 2312
Patent
active
058616640
ABSTRACT:
In an LSI package, terminal resistance elements are formed of resistive paste which, consisting of a mixture of fine powder of either oxidized metal or carbon and fine powder of glass, is buried and sintered in a ceramic wiring board in the direction to penetrate it. Front side wiring, connecting the parts of the terminal resistance elements exposed on the front face of the ceramic wiring board to input/output circuits of the LSI chip to be mounted on the front face of the ceramic wiring board, is formed on the front face of the ceramic wiring board and in the top layer of the ceramic wiring board. Back side wiring, connecting the parts of the terminal resistance elements exposed on the back face of the ceramic wiring board to a voltage clamp wiring network, is formed on the back face of the ceramic wiring board.
REFERENCES:
patent: 4221047 (1980-09-01), Narken et al.
patent: 4407007 (1983-09-01), Desai et al.
Rao R. Tummala et al., Microelectronics Packaging Handbook, 1989, Van Nostrand Reinhold, pp. 786-790.
Clark Jhihan B.
NEC Corporation
Saadat Mahshid D.
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