LSI microprocessor chip with backward pin compatibility and forw

Details LSI microprocessor chip with backward pin compatibility and forw LSI microprocessor chip with backward pin compatibility and forw

1984-09-26

1987-06-30

Williams, Archie E.

Boots, shoes, and leggings

371 11, G06F 100, G06F 1300

Patent

active

046775480

ABSTRACT:
A chip implemented in new technology is designed to include expandable levels of new functionality. The chip includes compatibility circuits which connect to a number of pins which are unused in the chip it replaces in an existing computer system. The compatibility circuits connect to those internal parts of the new chip that contain the newly added or altered levels of functionality. The new chip is installed in the existing computer system just as the prior chip. When so installed, the compatibility circuits enable the new chip to operate in the same manner as the replaced chip but at high speed and with improved performance. When the new chip is installed in the system for which it was designed, the compatibility circuits enable the chip to operate with a selectable level of new functionality at the same higher speed and improved performance.

REFERENCES:
patent: 2706222 (1955-04-01), Bjornson
patent: 4145760 (1979-03-01), Ward et al.
patent: 4148099 (1979-04-01), Lauffer et al.
patent: 4159541 (1979-06-01), Ward et al.
patent: 4168537 (1979-09-01), Uchida
patent: 4198698 (1980-04-01), Ong
patent: 4250407 (1981-02-01), Dorey et al.
patent: 4361868 (1982-11-01), Kaplinsky
patent: 4388685 (1983-06-01), Kotok
patent: 4504926 (1985-03-01), Toyoda
"A Smart Dynamic Memory Needs Only Four Pins", by Don Lauffer, Electronics, Oct. 11, 1979, pp. 144-150.

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