LSI memory circuit

Details LSI memory circuit LSI memory circuit

1984-11-21

1987-03-17

Popek, Joseph A.

Static information storage and retrieval

Addressing

365189, G11C 800

Patent

active

046513086

ABSTRACT:
In a LSI memory having a memory cell matrix, an address buffer for receiving address data, row decoder and column decoder for decoding address data, and output buffer for receiving the column decoder output, there is provided a driver, connected to the column-decoder output, which drives the output as a horizontal read address; and a driver, connected to the column decoder output, which drives the output as vertical read address. Any one of the drivers can be selected according to a desired read direction. The output of the selected driver is supplied to a selector. The selector receives data read out from the memory cell matrix and outputs horizontal read data or vertical read data using the driver output as address data.

REFERENCES:
Toshiba MOS Memory Products Data Book, p. 255, 1983-1984.

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