LSI logic circuit

Details LSI logic circuit LSI logic circuit

1987-07-20

1989-08-29

Eisenzopf, Reinhard J.

Electricity: measuring and testing

Plural, automatically sequential tests

324158R, 371 25, 371 15, G01R 3128, G01R 1512

Patent

active

048620688

ABSTRACT:
A LSI circuit having at least one combinational circuit and a latch coupled to the input side of the combinational circuit. The latch includes a switch for inhibiting the latching of either test data for testing the combinational circuit or data for a normal operation.

REFERENCES:
patent: 3783254 (1974-01-01), Eichelberger
patent: 4298980 (1981-11-01), Hajou et al.
patent: 4476431 (1984-10-01), Blum
patent: 4493077 (1985-01-01), Agrawal et al.
patent: 4553236 (1985-11-01), Zasio et al.
patent: 4701922 (1987-10-01), Kuboki et al.
Lee; "LSSD Latch Configuration Which Required Fewer Input Changes for Both Scan In and Scan Out Operation".
IBM Technical Disclosure Bulletin; vol. 20, No. 1; Jun. 1977; pp. 265-267.
Nikkei Electronics, McGraw-Hill Apr. 16, 1979, pp. 57-79 and translation thereof.

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