LSI gate array having reduced switching noise

Details LSI gate array having reduced switching noise LSI gate array having reduced switching noise

1991-08-14

1992-07-21

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307451, 307475, H03K 1716

Patent

active

051325632

ABSTRACT:
As the number of output circuits in LSI or VLSI circuits increases, the chance of many large output circuits operating as a same instant increases, which can cause a malfunction in the logic due to induced switching noise. In order to prevent such a problem, the switching speed of the driving buffer circuit for an output buffer circuit is controlled. By reducing the switching capacity of the driving circuit, the switching speed of the total circuit is not greatly affected and the noise is greatly decreased. Control of the switching capacity of the driving buffer circuit is performed by master slice technology. This opposite design concept, compared to that of prior art LSI design, has been proved by experiments.

REFERENCES:
patent: 3378783 (1968-04-01), Gibson
patent: 4255672 (1981-03-01), Ohno et al.
patent: 4611236 (1986-09-01), Sato

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