Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Integrated structure
Reexamination Certificate
2000-05-30
2002-03-12
Zweizig, Jeffrey (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
Integrated structure
C327S545000
Reexamination Certificate
active
06356144
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to an LSI core including a voltage generation circuit and a system LSI including such an LSI core, and in particular to an LSI core and a system LSI mountable on a semiconductor integrated circuit performing high speed data transfer.
2. Description of the Related Arts
The IEEE 1394 standards include physical standards and electric standards of connectors, and standards regarding the most basic signal sending and receiving.
A semiconductor integrated circuit represented by an IEEE 1394 physical layer LSI utilizes a technology for performing inter-device data transfer at a high speed. This technology is especially useful in fields which require a large amount of data to be processed at a high speed, for example, in the field of multimedia. The data transfer rate between semiconductor integrated circuits in accordance with the IEEE 1394 standards is 200 Mbps in the case of products now practically used, and 400 Mbps in the case of samples which are shipped today. On a research level, a technology for transferring data at a rate exceeding 1 Gbps has been developed.
For transferring data, a sending-side IEEE 1394 physical layer LSI outputs data to differential twisted paired cables in the form of a DC current. The current flowing through a resistor connected between the twisted paired cables generates a potential difference between the twisted paired cables. The potential difference is input to a receiving-side IEEE 1394 physical layer LSI.
In accordance with the standard of the IEEE 1394 physical layer LSI, as described in the IEEE 1394, draft standard, ver. 8.4, the potential difference between the twisted paired cables is used as data, and a common-mode voltage level of the twisted paired cables is also used as data. In order to allow the common-mode voltage level to be used as data, a common-mode voltage generation circuit is provided in the LSI.
Recently, the integration degree of LSIs has been raised due to the improvement in processing technologies, and thus system LSIs having many functions have been developed. An IEEE 1394 physical layer LSI is often mounted on a system LSI as a core, which complicates the design of the system LSI.
FIG. 5
is a block diagram illustrating a structure of a conventional IEEE 1394 physical layer LSI core (hereinafter, referred to as an “LSI core”)
510
.
A system LSI
500
is connected to an external bus line
540
conforming to the IEEE 1394 standards. The system LSI
500
performs data transfer in conformity to the IEEE 1394 standards through an external device (not shown) and the external bus line
540
. The external bus line
540
is connected to various loads including the external device. Herein, those loads are equivalently shown as a current load
550
.
The system LSI
500
includes an LSI core
510
and a pad
530
.
The LSI core
510
has the function of an IEEE 1394 physical layer. The pad
530
connects an internal circuit of the system LSI
500
and the external bus line
540
. Specifically, the pad
530
connects the LSI core
510
and the external bus line
540
.
The LSI core
510
includes a termination voltage generation circuit
520
for generating a termination voltage, and an output terminal
512
for outputting the termination voltage. The LSI core
510
can include other functional circuits not shown, which do not need to be specifically described herein. In the conventional example shown in
FIG. 5
, the term “termination voltage” is as a voltage which is output from an output section
522
of the termination voltage generation circuit
520
.
The termination voltage generation circuit
520
generates a voltage having a prescribed level. The level of the voltage is used as a data Signal as described above regarding the IEEE 1394 physical layer LSI. The termination voltage generation circuit
520
supplies the generated voltage to the output terminal
512
and to the external bus line
540
through the pad
530
as a termination voltage.
The termination voltage generation circuit
520
includes an output section
522
, an input section
524
, a comparator circuit
526
, and a reference voltage generation circuit
528
. The termination voltage generation circuit
520
outputs the generated voltage from the output section
522
. The termination voltage generation circuit
520
also receives the termination voltage from a voltage supply line provided between the output section
522
and the output terminal
512
of the LSI core
510
. The received termination voltage is input to the comparator circuit
526
through the input section
524
. The comparator circuit
526
compares the termination voltage which is input through the input section
524
and a desired termination voltage to be output. In response to the comparison result, a control section (not shown) of the termination voltage generation circuit
520
corrects the voltage from the comparator circuit
526
to make the voltage closer to the desired termination voltage. Then, the corrected voltage is output as a termination voltage from the output section
522
.
The reference voltage generation circuit
528
generates a voltage having a prescribed level as a reference voltage and supplies the reference voltage to the comparator circuit
526
.
The conventional system LSI
500
structured and operated as described above has the following problem.
While the system LSI
500
is connected to the external bus line
540
, the level of the termination voltage is lowered by the current load
550
and a resistance of a line connecting the pad
530
and the output terminal
512
. In other words, the voltage output from the pad
530
is lower than the actual termination voltage output from the output section
522
of the termination voltage generation circuit
520
.
The termination voltage generation circuit
520
supplies the termination voltage from the output section
522
on the precondition that the termination voltage is supplied to the pad
530
while maintaining the level thereof.
However, in actuality, the level of the termination voltage is lowered outside the LSI core
510
. The termination voltage generation circuit
520
can receive the voltage in the LSI core
510
as a monitored voltage through the input section
524
but cannot detect the voltage drop which occurs outside the LSI core
510
.
Accordingly, the desired termination voltage cannot be output from the pad
530
of the system LSI
500
. This is a defect peculiar to system LSIs having an IEEE 1394 physical layer core mounted thereon.
SUMMARY OF THE INVENTION
According to one aspect of the invention, an LSI core includes a first terminal; a second terminal; and a voltage generation circuit for generating a voltage. The first terminal is connected to a first external line provided outside the LSI core. The second terminal is connected to the first external line and to a second external line provided outside the LSI core. The voltage generation circuit includes a voltage generation section for generating the voltage, an output section for outputting the voltage generated by the voltage generation section to the first external line through the first terminal, and an input section for receiving the voltage, output to the first external line by the output section, through the second external line and the second terminal.
In one embodiment of the invention, the LSI core is a physical layer LSI core conforming to the IEEE 1394 standards.
According to another aspect of the invention, a system LSI includes an LSI core; a pad; a first line connected to the pad; and a second line connected to the first line. The LSI core includes a first terminal, a second terminal, and a voltage generation circuit for generating a voltage. The first terminal is connected to the first line provided outside the LSI core. The second terminal is connected to the second line provided outside the LSI core. The voltage generation circuit includes a voltage generation section for generating the voltage, an output section for outputting the voltage ge
Akamatsu Hironori
Hirata Takashi
Komatsu Yoshihide
Terada Yutaka
Yoshida Tadahiro
Matsushita Electric - Industrial Co., Ltd.
Renner, Otto, Boiselle & Sklar
Zweizig Jeffrey
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