LSI chip construction and method

Details LSI chip construction and method LSI chip construction and method

1974-07-24

1976-09-21

Tupman, W.

Metal working

Method of mechanical manufacture

Assembling or joining

29577, 29578, B01J 1700

Patent

active

039810704

ABSTRACT:
LSI chip construction having a semiconductor body with a plurality of transistors formed in the semiconductor body in a predetermined pattern and a plurality of resistors formed in a semiconductor body in a predetermined pattern. Means is provided which includes two layers of metallization having input and output pads adjacent the outer perimeter of the body and contacting said transistors and resistors to form a plurality of emitter-follower circuits with certain of the emitter-follower circuits being made up of larger transistors and being located near the perimeter of the chip and near the input-output pads. The other emitter coupled circuits are clustered in groups to form an array of such groups with each of the groups being capable of containing a plurality of logic circuits.

REFERENCES:
patent: 3484932 (1969-12-01), Cook
patent: 3618201 (1971-11-01), Makimoto
patent: 3641661 (1972-02-01), Canning
patent: 3707036 (1972-12-01), Okabe
patent: 3707767 (1973-01-01), Quevrin

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