Patent
1981-12-31
1984-06-05
Edlow, Martin H.
357 68, 357 70, 357 27, H01L 2702
Patent
active
044531761
ABSTRACT:
A carrier for LSI chips includes a built-in capacitor structure in the carrier. The capacitor is located beneath the chip with the plates of the capacitor parallel to the chip mounting surface or at right angles to the chip mounting surface. The capacitor is formed by assembling an array of capacitive segments together to form the first one of the plates of a capacitor with the other plate spanning a plurality of the segments of the first plate. Each of the segments of the first plate includes a set of conductive via lines which extend up to a severable link on the chip mounting surface. The severable via is cut by means of a laser beam or the like when the capacitor must be repaired by deleting a defective segment of the capacitor. Preferably, the structure includes a pair of parallel conductive charge redistribution planes above and below the capacitor plates with connections to the respective plates providing a low inductance structure achieved by providing a current distribution which results in cancellation of magnetic flux. The lower redistribution plane is preferably connected directly to the lower capacitor plate. The upper redistribution plane is preferably connected to the segments of the first capacitor plate by means of the vias which extend first to the chip mounting surface and then down to the redistribution plane which has connections to the chip mounting pads.
REFERENCES:
patent: 3740619 (1973-06-01), Rosvold
patent: 3748548 (1973-07-01), Haisty et al.
patent: 4288841 (1981-09-01), Gogal
patent: 4334236 (1982-06-01), Hoffman et al.
patent: 4360823 (1982-11-01), van Gils
Narken et al., "Low Capacitive Via Path Through High Dielectric Constant Material," IBM Technical Disclosure Bulletin, 22, No. 12, May 1980, pp. 5330-5331.
Lussow, Internal Capacitors and Resistors for Multilayer Ceramic Modules," IBM Technical Disclosure Bulletin, 20, No. 9, Feb. 1978, pp. 3436-3437.
Chance Dudley A.
Kopcsay Gerard V.
Edlow Martin H.
International Business Machines - Corporation
Jones II Graham S.
Mintel W.
LandOfFree
LSI Chip carrier with buried repairable capacitor with low induc does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with LSI Chip carrier with buried repairable capacitor with low induc, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and LSI Chip carrier with buried repairable capacitor with low induc will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1500782