Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Reexamination Certificate
2002-01-02
2004-11-02
Vigushin, John B. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For plural devices
C257S777000, C361S782000, C361S783000, C438S109000
Reexamination Certificate
active
06812566
ABSTRACT:
BACKGROUND
This invention relates generally to integrated circuits and particularly to designs for packaging an integrated circuit die.
An integrated circuit chip may be fabricated on a substrate, which may be a silicon wafer, by microelectronic processing. Typically, a multiplicity of chips (dice), separated by scribe lines, is formed simultaneously on a single wafer. Individual dice or chips are separated by dicing or sawing on the scribe lines.
Individual dice need to be electrically coupled to external circuitry. However, the dice are fragile and too small to handle easily. Further, they may also be vulnerable to contamination and corrosion by the environment, and subject to overheating during operation unless heat is dissipated. A die package provides the die with mechanical support, electrical connections, protection from contamination and corrosion, and heat dissipation during operation.
The process of packaging the die may include attachment of the die to the package, the bonding of wires from leads on the package to pads on the die, and encapsulation of the die for protection.
A Power Supply In Package (PSIP) design replaces capacitive charge pumps in a die with inductive charge pumps located outside the die, but still within the same package with the die. The resulting reduced die sizes reduce fabrication costs.
The external inductive charge pump includes discrete passive circuit elements such as inductors and capacitors that are included within the package with the die. As a result of the lack of integration of the charge pump into the die, the resulting package is generally larger. Thus, cost savings may be achieved, but the price may be larger package sizes.
The larger package size may be a problem in some applications. Designers may be hesitant to use PSIP parts because doing so may require re-design of the board layout to accommodate the larger package size. In some cases, extra board real estate may be difficult to come by.
Thus, there is a need for PSIP packages that substantially preserve non-PSIP form factors.
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Foehringer Richard B.
Rabadam Eleanor P.
Intel Corporation
Trop Pruner & Hu P.C.
Vigushin John B.
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