Low-wear writing in a solid state memory device

Details Low-wear writing in a solid state memory device Low-wear writing in a solid state memory device

2011-08-30

2011-08-30

Le, Thong Q (Department: 2827)

Static information storage and retrieval

Floating gate

Multiple values

C365S185170, C365S185140, C365S185050, C365S189060

Reexamination Certificate

active

08009471

ABSTRACT:
A method includes programming a non-volatile memory. The memory includes a plurality of cells, wherein each cell is configured to store a plurality of values, wherein each of value is represented by N digits where N is an integer greater than 1, wherein each of the plurality of cells is further configured to store electric charge representing a plurality of voltage levels, and wherein each of the plurality of voltage levels represents one of the plurality of values. Programming comprises providing the plurality of voltage levels into a first group of voltage levels and a second group of voltage levels in one of the plurality of cells, wherein a highest voltage level of the first group is less than or substantially equal to a lowest voltage level of the second group, and storing, in the first group of voltage levels, electric charge representing a value comprising, at most, N-1 digits.

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patent: 2009/0154238 (2009-06-01), Lee

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