Low-voltage transistor circuit for suppressing high-voltage...

Details Low-voltage transistor circuit for suppressing high-voltage... Low-voltage transistor circuit for suppressing high-voltage...

1999-04-23

2003-12-16

Harvey, Minsun Oh (Department: 2644)

Telephonic communications

Subscriber line or transmission line interface

C379S412000

Reexamination Certificate

active

06665400

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to the field of modem circuits, and more particularly, to a telephone line interface circuit incorporating low-voltage transistors to suppress high-voltage, short-term voltage surges.
2. Description of Related Art
FIG. 1
illustrates a typical prior-art telephone line interface circuit
10
for use in a modem circuit. Before the modem accesses the telephone line, the telephone line interface circuit
10
is normally in an “on-hook” state, meaning that the modem circuit is disconnected from the telephone line. In order for the modem to go “off-hook” (i.e. access the telephone line), an off-hook signal “OH”
103
is applied to a relay switch
102
. The transistor
106
draws a loop current sufficient to notify the telephone system that the modem is now off-hook. When the circuit is on-hook, the relay
102
effectively isolates the transistor from the telephone line, and any high-voltage surges as well. Thus, the transistor
106
only needs to be protected from high-voltage surges when the modem is off-hook.
High-voltage surges on telephone lines may result from, for example, lightening strikes. These strikes can be simulated using test pulses of approximately 800 V for relatively short periods. Such high-voltage spikes or surges could easily damage unprotected equipment connected to a telephone line. Therefore, the FCC requires all products intended for use with the telephone system to pass a “Part 68” high-voltage pulse test.
As a first level of protection against high-voltage surges on the telephone line, a 400 V peak (175 V RMS) MOV (metal oxide varistor)
101
is placed across the tip and ring lines of the circuit of
FIG. 1
to dissipate any voltage surges. However, a 400 V peak surge would still likely exceed the limits of the transistor
106
. Therefore, a zenor diode
104
(typically 13 V) is also placed across the transistor
106
to provide an extra level of protection.
This voltage surge protection scheme works well for a telephone line interface circuit incorporating a relay
102
. However, newer telephone line interface circuits have eliminated the relay
102
in order to reduce the size and cost of the interface circuitry. Merely placing a zenor diode
104
across the transistor
106
is no longer a valid option, since without a relay switch, the zenor diode
104
will constantly draw loop current and the modem could never go on-hook. Also, using a high-voltage transistor capable of withstanding a high-voltage surge is not practical, since high-voltage transistors do not provide adequate signal distortion performance. Also, for a given design, only a single vendor's transistor could be incorporated to provide adequate voltage and distortion characteristics. Thus, there is a need for a high-voltage surge protection design for use with relay-less telephone line interface circuits.
SUMMARY OF THE INVENTION
The present invention is a telephone line interface circuit incorporating low-voltage transistors to suppress high-voltage, short-term voltage surges. Specifically, a low-voltage transistor such as a Central Semiconductor C2TA44, a Motorola MPSA42, or similar such transistors actually can withstand a high-voltage spike exceeding the manufacturers specified parameters. The present invention exploits this undocumented feature by employing such a transistor in combination with a metal oxide varistor in order to provide adequate voltage surge protection. Thus, a zenor diode is not necessary (avoiding on-hook problems) and the relay-less circuit still passes the FCC Part 68 test.


REFERENCES:
patent: 4213061 (1980-07-01), Conner
patent: 4465903 (1984-08-01), Barber
patent: 4634814 (1987-01-01), Pommer, II
patent: 5315651 (1994-05-01), Rahamim et al.
patent: 5414587 (1995-05-01), Kiser et al.
patent: 5875235 (1999-02-01), Mohajeri
patent: 6031705 (2000-02-01), Gscheidle
patent: 6061445 (2000-05-01), Rahamim et al.
patent: 6088446 (2000-07-01), Huang

Affiliated with

Also associated with

Rating

Low-voltage transistor circuit for suppressing high-voltage... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Low-voltage transistor circuit for suppressing high-voltage..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low-voltage transistor circuit for suppressing high-voltage... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3182331