Low voltage swing bus analysis method using static timing...

Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Electrical signal parameter measurement system

Reexamination Certificate

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C716S030000, C716S030000, C716S030000, C716S030000, C713S500000, C713S400000

Reexamination Certificate

active

07043382

ABSTRACT:
A low voltage swing bus analysis method using a static timing analysis (STA) tool, which provides simple and accurate timing analysis verification. The low voltage swing bus analysis method is used in a static timing analysis (STA) tool. The STA tool receives a design file which executes the timing verification program then extracts the timing model for each cell, present in a design file during execution of the timing verification program, and calculates a timing for each node. The STA tool extracts a timing model for a sense amplifying flip flop, among cells present in the design file during execution of the timing verification program, from execution of a subroutine and calculating a timing for each node connected to the sense amplifying flip flop. The STA tool outputs the calculated timings.

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patent: 2004/0076192 (2004-04-01), Zerbe et al.
patent: 11168120 (1999-06-01), None

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