Low voltage supply circuit for integrated circuit

Electricity: power supply or regulation systems – Self-regulating – Using a three or more terminal semiconductive device as the...

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323317, G05F 316

Patent

active

058776168

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

1. Field of the Invention
The present invention relates to the generation of an internal supply voltage on integrated circuits; and more particularly to internal supply voltages having a lower potential than power supply potentials provided to the integrated circuit, and which consume very little stand-by power.
2. Description of Related Art
In the design of integrated circuits, a need often arises to provide a supply voltage on the integrated circuit which is lower than the voltage supplied by an external power supply. For example, in the design of flash memory devices, it is typical to provide an external supply voltage at about 5 volts, and at times, at about 12 volts. A number of other supply voltage levels are required for the complex procedures involved in a programming and erasing and reading the flash memory cells. The problems associated with various supply voltages in flash memory devices can be understood, for example, with reference to U.S. Pat. No. 5,295,113; entitled FLASH MEMORY SOURCE INHIBIT GENERATOR, invented by Dix, et al.
A circuit that supplies a supply voltage in an integrated circuit must be capable of sustaining substantial on demand current, in order to maintain the voltage potential at its output under varying load conditions. Prior art designs for generating internal supply voltages of this type, therefore have been relatively high power consumers. For example, in the Dix, et al. patent cited above, a low voltage supply circuit is described which is used for the so-called source inhibit function in a flash memory integrated circuit having the architecture described in Dix, et al. Although the supply circuits of Dix, et al. operate to provide a relatively stable internal supply voltage, they suffer the disadvantage that they consume substantial current even in the stand-by mode.
As the design of integrated circuits has evolved toward uses in which low current stand-by modes are important, a need has arisen to provide internal supply voltages with much less stand-by current consumption than has been available in the prior art.


SUMMARY OF THE INVENTION

The present invention provides a low voltage supply circuit that supplies an internal supply voltage in an integrated circuit, which consumes very little stand-by current, yet provides substantial driving power to maintain the internal supply node at the desired voltage level.
The low voltage supply circuit of the present invention can be characterized as having a first branch which is connected to a first power supply node on an integrated circuit, and includes a pull-up circuit, a first transistor, a second transistor, and a reference circuit connected in series. The first transistor has a drain, a source and a gate; the drain and the gate of the first transistor being connected to a first node. The pull-up circuit in the first branch is coupled between the first node and the first power supply node. The second transistor has a drain, a source and a gate; the drain and the gate of the second transistor being connected to a second node. The reference circuit is connected between the ground supply node of the integrated circuit and the second node, supplying a reference potential to the second node. The sources of the first and second transistors are coupled in common to a third node in the first branch. A second branch of the low voltage supply circuit includes a third transistor and a fourth transistor. The third transistor has a drain, a source and a gate, the drain of the third transistor being coupled to the second power supply node, the gate of the third transistor being connected to the first node in the first branch, and the source of the third transistor being connected to an output node for the low voltage supply circuit. The fourth transistor in the second branch has a drain, a source and a gate. The drain of the fourth transistor is coupled to the ground supply node, the gate of the fourth transistor is connected to the second node in the first branch; and the source of the fourth transisto

REFERENCES:
patent: 4300091 (1981-11-01), Schade, Jr.
patent: 4453094 (1984-06-01), Peil et al.
patent: 5204612 (1993-04-01), Lingstaedt
patent: 5315230 (1994-05-01), Cordoba et al.
patent: 5446397 (1995-08-01), Yotsuyanagi
patent: 5481179 (1996-01-01), Keeth
patent: 5506543 (1996-04-01), Yung
patent: 5512855 (1996-04-01), Kimura

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