Low voltage single supply CMOS electrically erasable read-only m

Static information storage and retrieval – Floating gate – Particular connection

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365149, 36518527, G11C 1134

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active

057904553

ABSTRACT:
P channel EEPROM cells are designed for integration into arrays written with single polarity signals developed from small, low power charge pumps. These cells reduce the additional masking steps that must be added to a CMOS logic process for EEPROM to only one additional step. The novel cells of this invention enable the array to function with a V.sub.PP about 2 V less than that required by an N channel EEPROM cell, with similar writing speed and tunnel oxide thickness.

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Ohnakado, T., et al., Novel Electron Injection Method Using Band-to-Band Tunneling Induced Hot Electron (BBHE) for Flash Memory with a P-channel Cell, IEEE, IEDM 95-279, pp. 11.5.1-11.5.4 (1995).

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