Low voltage reference with power supply rejection ratio

Details Low voltage reference with power supply rejection ratio Low voltage reference with power supply rejection ratio

1999-09-09

2000-09-12

Riley, Shawn

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

323901, G05F 316

Patent

active

061182664

ABSTRACT:
A method and apparatus for a voltage reference is provided. The circuit may include one or more of the following features: cascode compensation with load balancing to increase the bandwidth of the amplifier for enhanced power supply rejection ratio; PMOS and NMOS in the input stage to expand common mode, having a high gain over voltage range; current mirror using active resistors; and a start-up circuit. The voltage reference comprises an amplifier having an output, the amplifier comprising a first amplifier stage and a second amplifier stage. The amplifier further includes a power-down circuit coupled to the second amplifier stage to float the amplifier output when a power-down signal is active. The voltage reference includes a source follower, the output of the amplifier coupled to the gate of the source follower, and a bandgap circuit for providing a bandgap voltage. The voltage reference further includes a level shifter coupled to the bandgap circuit, the level shifter for providing a second stable operating point, an output of the level shifter or an output of the bandgap circuit being coupled to the first amplifier stage as an input and a current mirror. The voltage reference further comprises a precision resistor for sinking a current generated by the current mirror, the output of the voltage regulator being coupled to one end of the precision resistor.

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