Low voltage pull-down circuit

Details Low voltage pull-down circuit Low voltage pull-down circuit

2007-11-06

2007-11-06

Lam, Tuan T (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S198000, C327S077000

Reexamination Certificate

active

11200711

ABSTRACT:
A low voltage pull-down circuit for maintaining a node at a logic LOW voltage is provided. When a logic LOW is desired, the circuit provides a low-impedance path from the node to ground. The node may be pulled-up to a logic HIGH voltage, for example, by removing the low-impedance path and allowing a voltage source to reach the node through a resistor or transistor. A low voltage pull-down circuit may be provided in a power supervision circuit for systems that operate with, for example, low power conditions. The open-drain node is utilized as a power-on-reset node that provides a LOW logic signal to a system when the power being supplied to the system is below a predetermined voltage threshold.

REFERENCES:
patent: 5550486 (1996-08-01), Sweeney et al.
patent: 6198318 (2001-03-01), Bhaskaran et al.
patent: 6281723 (2001-08-01), Tailliet
patent: 6380769 (2002-04-01), Hall
patent: 6759852 (2004-07-01), Samad
patent: 2003/0122595 (2003-07-01), Hall et al.

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