Low-voltage output driving circuit having pull-up transistor wit

Details Low-voltage output driving circuit having pull-up transistor wit Low-voltage output driving circuit having pull-up transistor wit

1994-06-17

1999-08-24

Wells, Kenneth B.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

327312, 327313, 327321, 327544, H03K 300, H03K 508

Patent

active

059429232

ABSTRACT:
A low-voltage output driving circuit capable of preventing the generation of leakage current. The circuit includes a transfer gate GT installed between the output S.sub.2 of a first CMOS inverter INV.sub.C1 and the node S.sub.1 at the gate of an MOS transistor PT.sub.3 for active pull-up. At the same time, a reference voltage V.sub.REF and a voltage level V.sub.OUT, which corresponds to the voltage level of the output line of the signal S.sub.OUT, are compared by a comparator CMP. When the voltage V.sub.OUT is lower than the reference voltage V.sub.REF, the transfer gate GT is set to the ON state, and the output of the first CMOS inverter INV.sub.C1 is sent to the gate of the transistor PT.sub.3 for active pull-up. The comparator CMP is installed so that when the voltage level V.sub.OUT is higher than the reference voltage V.sub.REF, the output of the first CMOS inverter INV.sub.C1 is prevented from reaching the gate of the transistor PT.sub.3 for active pull-up. Thus, although the input and output can take on any state, the generation of leakage current which flows toward the power supply from the output side can be prevented.

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