Low voltage level power-up detection circuit

Static information storage and retrieval – Powering

Reexamination Certificate

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Details

C327S143000

Reexamination Certificate

active

06320809

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to power-up detection circuits which have utility in a wide variety of integrated circuit structures, and particularly for detecting a power-up condition in a memory device.
DISCUSSION OF THE RELATED ART
FIG. 1
depicts a conventional power-up detecting circuit for use in a memory device such as a DRAM. The
FIG. 1
circuit indicates a power-up condition when applied Vcc reaches a predetermined value. It includes a differential amplifier
11
which is connected to receive at a negative input a voltage provided at a drain of a transistor
13
, the latter of which is connected to ground through a resistance
15
. The source terminal of the transistor
15
is connected to Vcc. The positive input of differential amplifier
11
is connected to node A which is also connected to the gate of transistor
13
.
Node A is also at the junction of a resistor
19
and a transistor
17
, the latter of which is connected as a diode. In operation, when the voltage Vcc is first applied and begins to rise, the voltage at node A between resistor
19
and transistor
17
likewise begins to rise until transistor
13
turns on, clamping the voltage of node A at a Vt. Resistor
15
holds node B at ground until Vcc is a Vt above node A. Once Vcc is greater than a Vt above node A, transistor B turns on charging node B to Vcc. When the voltage at node B crosses the voltage of node A, amplifier
11
switches state and provides a power-up output signal. This is illustrated in
FIG. 4
as the crossing point of the node A and node B voltage curves. Note that in
FIG. 4
, node B charges to Vcc. The instantaneous value of Vcc where switching occurs is typically at Vcc minus the additive threshold voltages Vt of transistors
13
and
17
, e.g., Vcc−2 Vt.
Although the
FIG. 1
circuit works adequately in detecting a power-up condition for higher values of Vcc, the 2 Vt voltage drop detection point is too high for low voltage Vcc values. Many memory devices, e.g. DRAMS, are now beginning to operate at approximately 1.8 volts. Accordingly, the use of transistors
17
and
13
to set the switching threshold point at 2 Vt does not allow for sufficient variability to accommodate different low levels of operating voltage Vcc. Accordingly, a more versatile power-up circuit is needed.
SUMMARY OF THE INVENTION
The present invention is directed to a power-up detection circuit for integrated circuit devices, for example, memory devices such as DRAMS, in which the threshold switching voltage point can be adjusted without regard to a fixed voltage drop set by a transistor or diode, and in which a power-on condition can be detected at a selected one of a plurality of operative voltage levels. A programmable resistor network is used in the detection circuit to establish the switching voltage point. Various resistors of the resistor network can be selectively made operative or inoperative in accordance with a set pattern programmed into the resistance network.


REFERENCES:
patent: Re. 35825 (1998-06-01), Zagar
patent: 4585955 (1986-04-01), Uchida
patent: 5235550 (1993-08-01), Zagar
patent: 5469099 (1995-11-01), Konishi
patent: 5644546 (1997-07-01), Furumochi et al.
patent: 6104221 (2000-08-01), Hoon
patent: 6108246 (2000-08-01), Umezawa et al.

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