Low-voltage joystick port interface

Details Low-voltage joystick port interface Low-voltage joystick port interface

1998-07-10

2001-10-02

Horabik, Michael (Department: 2635)

Coded data generation or conversion

Bodily actuated code generator

C327S100000, C327S142000, C327S333000, C345S101000

Reexamination Certificate

active

06297751

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a low-voltage joystick port interface and a method of interfacing a standard-voltage joystick with a low-voltage port of a processor.
2. Description of Prior Art
As a peripheral device, a user manipulated joystick enables the real-time interaction between a user and a host computer which is necessary for certain computer applications (e.g., computer games). The joystick typically includes a potentiometer for each orthogonal coordinate axis. The resistance of the potentiometer varies in direct relation to the joystick handle position along the corresponding coordinate axis. Each potentiometer has a first terminal connected to a 5 Volt supply. To provide digital values which may be processed by the host computer, a second terminal of the joystick potentiometer is connected to a joystick port interface.
As illustrated in
FIG. 1
, the prior art joystick port interface
120
(illustrated for a single coordinate axis only, e.g., the X-axis) includes a quad timer
126
and a “recommended” Resistor-Capacitor (RC) network having a resistor
122
(typically R=2.26 kilohms) and a capacitor
124
(typically C=10 nF). A first terminal of the RC network resistor
122
is serially coupled to the joystick potentiometer
112
, while the other terminal of the RC network resistor
122
is coupled to a node A. A first terminal of the RC network capacitor
124
is coupled to the node A, while the other terminal of the RC network capacitor
124
is connected to ground. The quad timer
126
is coupled to the node A, and receives the analog voltage level, JSout, across the RC network capacitor
124
. The quad timer
126
includes an analog comparator (not shown) which compares JSout with a predetermined threshold voltage Vt (typically 3.34 Volts) and outputs a pulse signal P
i
to the host computer.
Upon receiving a request from the host computer, the quad timer
126
discharges the RC network capacitor
124
and sets P
i
to a logic “1” level. As current passes though the joystick potentiometer
112
, the RC network capacitor
124
charges until Vt is reached. At this time the quad timer
126
sets P
i
back to a logic “0” level. The pulse width of P
i
thus represents the time interval, T, required to charge the RC network capacitor
124
to the threshold voltage Vt. The pulse width of P
i
is monitored by the host computer to indicate the resistance of the joystick potentiometer
112
which, as discussed above, has a direct relation to the coordinate position of the joystick
110
.
For the conventional joystick port interface described above, both the joystick
110
and the quad timer
126
utilize a 5 Volt power supply. The power supply for the next generation of integrated circuits, however, will be substantially less than 5 Volts, and therefore a low-power port is needed to interface the conventional 5 Volt joystick device with a lower-Volt integrated circuit such as a CMOS (complementary metal-oxide silicon) VLSI (very large-scale integration) circuit.
SUMMARY OF THE INVENTION
The joystick port interface according the present invention is a low power port which interfaces a typical 5 Volt joystick peripheral device with a lower power computer port. The low-voltage joystick port interface includes a bidirectional buffer circuit and a pulse generator which, together, generate a digital pulse signal, representing a joystick coordinate position, based on an input analog measurement signal.


REFERENCES:
patent: 4886941 (1989-12-01), Davis
patent: 5821924 (1998-10-01), Kikinis
patent: 5867051 (1999-02-01), Liu
patent: 5874944 (1999-02-01), Khoury
patent: 5920734 (1999-02-01), Holmdahl
patent: 5991830 (1999-11-01), Beard

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