Low voltage, island-layer-based nonvolatile semiconductor...

Details Low voltage, island-layer-based nonvolatile semiconductor... Low voltage, island-layer-based nonvolatile semiconductor...

2006-03-07

2006-03-07

Tran, Andrew Q. (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185270, C365S185260, C365S185180

Reexamination Certificate

active

07009888

ABSTRACT:
A method for driving a nonvolatile memory device including a semiconductor substrate, an island semiconductor layer on the substrate, a memory cell having a control gate and a charge storage layer surrounding a peripheral surface of the island semiconductor layer, a first selection transistor provided between the memory cell and the substrate and having a first selection gate, a source diffusion layer between the substrate and the island semiconductor layer, a drain diffusion layer provided in an opposing end of the island semiconductor layer from the source diffusion layer, and a second selection transistor provided between the memory cell and the drain diffusion layer and having a second selection gate, the method comprising the steps of: applying a negative first voltage to the drain and the first selection gate, applying a positive second voltage to the second selection gate, and applying 0V or a positive third voltage to the source; and applying a positive fourth voltage higher than the second voltage to the control gate of the memory cell for injecting electric charges into the charge storage layer.

REFERENCES:
patent: 4451905 (1984-05-01), Moyer
patent: 5117392 (1992-05-01), Harada
patent: 5436552 (1995-07-01), Kajimoto
patent: RE37311 (2001-08-01), Kato et al.
patent: 6643210 (2003-11-01), Yamano
patent: 04-079369 (1992-03-01), None
patent: 2002-057231 (2002-02-01), None

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