Low voltage high density trench-gated power device with...

Details Low voltage high density trench-gated power device with... Low voltage high density trench-gated power device with...

2007-10-02

2009-12-15

Pert, Evan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Junction field effect transistor

C257S341000, C257S401000, C257SE21549, C257SE29201

Reexamination Certificate

active

07633102

ABSTRACT:
Merging together the drift regions in a low-power trench MOSFET device via a dopant implant through the bottom of the trench permits use of a very small cell pitch, resulting in a very high channel density and a uniformly doped channel and a consequent significant reduction in the channel resistance. By properly choosing the implant dose and the annealing parameters of the drift region, the channel length of the device can be closely controlled, and the channel doping may be made highly uniform. In comparison with a conventional device, the threshold voltage is reduced, the channel resistance is lowered, and the drift region on-resistance is also lowered. Implementing the merged drift regions requires incorporation of a new edge termination design, so that the PN junction formed by the P epi-layer and the N+substrate can be terminated at the edge of the die.

REFERENCES:
patent: 5072266 (1991-12-01), Bulucea et al.
patent: 5674766 (1997-10-01), Darwish et al.

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