Low voltage field emission device

Semiconductor device manufacturing: process – Electron emitter manufacture

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Details

438637, 438679, 438682, H01L 2170, H01L 21465

Patent

active

057892725

ABSTRACT:
With a view to reducing the gate voltage in Field Emission Devices, three different methods for reducing the diameter of the gate opening in such devices are described. In the first method, metal is deposited on the gate electrode (which is made of polysilicon or amorphous silicon) at an oblique angle of incidence so that the vertical wall of the opening is coated, but not its lower surface. In the second method, all exposed surfaces are coated with metal. For both methods, metal is then removed from all non-polysilicon surfaces through a silicidation step followed by selective etching. In the third method, the gate electrode is selectively coated with a layer of tungsten. In all cases, a uniform reduction of the gate opening is achieved.

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patent: 5461009 (1995-10-01), Huang et al.
patent: 5468662 (1995-11-01), Havemann
patent: 5504038 (1996-04-01), Chien et al.
patent: 5656525 (1997-08-01), Lin et al.

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