Low-voltage EEPROM using charge-pumped word lines

Details Low-voltage EEPROM using charge-pumped word lines Low-voltage EEPROM using charge-pumped word lines

1994-12-06

1996-07-16

Popek, Joseph A.

Static information storage and retrieval

Addressing

Sync/clocking

36523006, 36518911, G11C 800

Patent

active

055373623

ABSTRACT:
A Low-voltage Electrically Erasable, Electrically Programmable Read Only Memory (EEPROM) and a method for reading memory cells in the EEPROM. During a read operation address input is provided to an address latch and edge detector, which supplies a changed address signal to a charge-sharing word line voltage generator, supplies word line address signals to a word line address decoder, and supplies bit line address signals to a bit line address decoder and sense amplifier circuit. The word line address decoder provides a positive voltage from a positive voltage source to a selected word line in the memory array and provides a voltage that is negative with respect to ground to deselected word lines. The bit line address decoder and sense amplifier circuit grounds selected source bit lines and senses drain to source current to read the memory cells. The charge-sharing word line voltage generator and charge-sharing bit line voltage generator use a plurality of charge pump circuits and capacitors to store and share charge with the word lines. The EEPROM has a reduced erased voltage threshold range by extending the erase time during erase operations.

REFERENCES:
patent: 4667312 (1987-05-01), Doung et al.
patent: 4823317 (1989-04-01), Brahmbhatt
patent: 5025422 (1991-06-01), Moriwaki et al.
patent: 5400279 (1995-03-01), Momodomi et al.
Kuniyoshi Yoshikawa et al., "Comparison of Current Flash EEPROM Erasing Methods: Stability and How to control", 1992, pp. 595-598, IEDM Technical Digest.
K. Oyama et al., "A Novel Erasing Technology for 3.3V Flash Memory with 64Mb Capacity and Beyond", 1992, pp. 607-610, IEDM Technical Digest.
Seiji Yamada et al., "A Self-Convergence Erasing Scheme For a Simple Stacked Gate Flash EEPROM", 1991, pp. 307-310, IEDM Technical Digest.

Affiliated with

Also associated with

Rating

Low-voltage EEPROM using charge-pumped word lines does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Low-voltage EEPROM using charge-pumped word lines, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low-voltage EEPROM using charge-pumped word lines will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1789954