Oscillators – Ring oscillators
Reexamination Certificate
2000-05-01
2002-05-28
Mis, David (Department: 2817)
Oscillators
Ring oscillators
C331S034000, C331S17700V, C331S185000, C327S109000, C327S543000
Reexamination Certificate
active
06396357
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to oscillators, and in particular, to voltage-controlled ring oscillators.
DESCRIPTION OF THE RELATED ART
The voltage-controlled oscillator (VCO) is an important building block in PLLs, clock recovery circuits, and frequency synthesizers. High frequency and radio frequency (RF) voltage-controlled oscillators can be implemented monolithically as LC oscillators, as relaxation oscillators and ring oscillators. Although ring oscillators tend to have poor phase noise characteristics compared to high Q LC oscillators, they have the advantage of a wider range of oscillation, and ease of monolithic integration which results in small semiconductor die size. Ring oscillators are particularly attractive for quadrature clocks and multiphase clock signal generation required for conventional clock recovery circuits and high-speed sampling systems.
Ring oscillators are frequently used in the prior art to generate high frequency clock signals. As referred to above, ring oscillators may be controlled by a voltage or current source to generate a variable frequency signal. Most conventional voltage or current-controlled ring oscillators are nonlinear in frequency. In particular, as the input control voltage or current signal to these ring oscillators varies, the oscillation frequency of the circuit does not respond linearly.
Briefly, a ring oscillator consists of multiple stages of amplification and delay that are connected in tandem, with the last stage coupled back to the first stage in the form of a ring around which the signals propagate. Each stage of the ring oscillator provides a phase shift. In particular, each half period the signal will propagate around the delay cell ring with an inversion. Ring oscillators can be implemented using differential pair or current-starved single-ended inverter structures. However, while differential pair structures reject power supply noise well, the frequency range and voltage swing may not be sufficient for some applications (particularly low voltage applications). Current-starved single-ended inverter structures are also sensitive to power supply noise. Although a voltage regulator can be utilized to reduce the effect of power supply noise, it is typically undesirable to use a regulator in low voltage applications.
It has been recognized in the prior art that it is beneficial to use differential amplifiers for each of the stages of the ring oscillator in order to cause the oscillator to be more immune to the influence of spurious noises in the form of voltage and current spikes that might be coupled to both sides of the differential circuit. Such a spurious noise from the power supply, for example, would be coupled to both sides of the differential amplifier, and it would therefore affect both of the sides of the differential stages substantially equally. Consequently, the effect of such spurious noise is minimized on the output of the oscillator, which can be taken as the difference of the outputs of any one of the stages.
Two problems associated with using differential amplifiers in a ring oscillators are differential mode lockup and common mode lockup. Differential mode lockup refers to the phenomenon that occurs where each stage (differential amplifier) of the ring oscillator would end up with its output at either the opposite voltage limits or at the same voltage limit as the other stages. However, differential mode lockup typically only occurs in a ring oscillator with an even number of stages (e.g., 2, 4, 6, etc.). For example, in a simple two stage ring oscillator, differential lockup could occur with the first output of stage one and the second output of stage two sitting at one voltage limit while the second output of stage one and the first output of stage two are sitting at the opposite voltage limit. Common mode lockup could occur with the first and second outputs of stage one sitting near one voltage limit while the first and second outputs of stage two are sitting near the opposite voltage limit.
Differential mode lockup can be prevented in a ring oscillator using an even number of stages by crossing the connections made between the outputs and the inputs for one pair (or an odd number of pairs) of connections in the ring oscillator. As a result, an additional phase inversion is provided in the differential signal path, and lockup of the oscillator on a differential basis is prevented.
Voltage-controlled ring oscillators (VCROs) are well known and are used for various purposes in the art. Although there are many different types of voltage-controlled ring oscillators are known in the prior art, most operate at relatively high input voltages (e.g., 3-10 Volts). In some applications (e.g., pagers, cellular phones), it may be necessary to operate a VCRO from a low voltage source (e.g., 1-2 Volts) to reduce the power consumption.
Low power is a key requirement in PLLs which use batteries as a power supply, since battery lifetime can affect talk time in portable wireless communication (e.g., cellular) devices. As stated above, conventional differential pair and current-starved single-ended inverter structures are not well suited for low voltage applications.
Therefore, there is currently a need for a voltage-controlled ring oscillator structure which operates from a relatively low voltage source.
SUMMARY OF THE INVENTION
The present invention is a ring oscillator including a voltage-to-current converter for producing at least one control current from at least one control voltage and, a plurality of delay cells coupled to the converter, wherein at least one output of the one of the delay cells is coupled to the input of another of the delay cells, wherein the voltage-to-current converter produces a substantially linear output when the at least one control voltage is varied between zero volts and a rail supply voltage.
The above and other advantages and features of the present invention will be better understood from the following detailed description of the preferred embodiments of the invention which is provided in connection with the accompanying drawings.
REFERENCES:
patent: 5142249 (1992-08-01), Hirotomi
patent: 5440277 (1995-08-01), Ewen et al.
patent: 5514989 (1996-05-01), Sato et al.
patent: 5710527 (1998-01-01), Yaguchi et al.
patent: 5831486 (1998-11-01), Wehbi
patent: 5952892 (1999-09-01), Sajada
patent: 6011443 (2000-01-01), Chen et al.
Patrik Larson, “A 2-1600-MHz CMOS Clock Recovery PLL with Low-Vdd Capability”,IEEE Journal of Solid-State Circuits, vol. 34, No. 12, Dec. 1999, pp. 1951-1960.
Lizhong Sun and Tad Kwasniewski, “A 1.25GHz 0.35&mgr;m Monolithic CMOS PLL Clock Generator for Data Communications”, IEEE 1998 Custom Integrated Circuits Conference, pp. 265-268.
J.G. Maneatis and M.A. Horowitz, “Precise Delay Generation Using Coupled Oscillators”,IEEE Journal of Solid-State Circuits, vol. 28, No. 12, Dec. 1993, pp. 1273-1282.
A.W. Buchwald, K.W. Martin, A.K. Oki and K.W.Kobayashi, A 6-Ghz Integrated Phase-Locked Loop Using A1GaAs/GaAs Heterojunction Bipolar Transistors,IEEE Journal of Solid-State Circuits, vol. 27, No. 12, Dec. 1992, pp. 1752-1762.
B. Kim, D.N. Helman and P.R. Gray, “A 30-MHz Hybrid Analog/Digital Clock Recovery Circuit in 2&mgr;m CMOS”,IEEE Journal of Solid-State Circuits, vol. 25, No. 6, Dec. 1990, pp. 1385-1394.
Nelson Dale
Sun Lizhong
Agere Systems Guardian Corp.
Duane Morris LLP
Mis David
LandOfFree
Low voltage differential voltage-controlled ring oscillator does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Low voltage differential voltage-controlled ring oscillator, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low voltage differential voltage-controlled ring oscillator will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2820881