Low voltage differential signaling systems and methods

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Reexamination Certificate

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Details

C327S309000

Reexamination Certificate

active

06639434

ABSTRACT:

BACKGROUND
1. Technical Field
The present invention relates generally to electrical circuits and, more particularly, to interface circuits to support, for example, low voltage differential signaling.
2. Related Art
Low voltage differential signaling (LVDS) has emerged as a popular differential data transmission method. LVDS offers many advantages, such as low noise and low power while providing a robust and high-speed data transmission.
Because of its many advantages, LVDS has been deployed across market segments for numerous applications. As a result, there exist a number of different types of LVDS standards or signal level requirements. For example, IEEE standard 1596.3 and HyperTransport specifications employ LVDS, but have different signaling level requirements, such as for the offset voltage (or common mode voltage level) or the differential output voltage swing.
A drawback of having numerous LVDS signal level requirements is that a device is typically designed to support only one specific type of LVDS, which limits the device's applicability. Alternatively, the device is implemented with a specific circuit to support each respective type of LVDS. A drawback of this approach is that it becomes difficult to select which combination of specific circuits should be incorporated into the device due to the number of existing LVDS signal level requirements and the rapid pace at which they continue to emerge and evolve. As a result, there is a need for systems and methods that address the various LVDS requirements.
BRIEF SUMMARY
Systems and methods are disclosed herein for supporting two or more LVDS signal level requirements. For example, in accordance with an embodiment of the present invention, an LVDS driver (or buffer) supports two different LVDS signal level requirements by having a programmable common mode voltage (offset voltage). Furthermore, other parameters, such as the bias current or differential output voltage may also be programmable. As a result, by utilizing the techniques discussed herein, one LVDS driver can support many different LVDS standards or signal level requirements. As an example, an LVDS driver in accordance with an embodiment of the present invention can be provided for a programmable device, such as a complex programmable logic device, a programmable logic device, or a field programmable gate array, to support various LVDS interface requirements.
More specifically, in accordance with one embodiment of the present invention, a driver includes a multiplexer adapted to select from a plurality of reference voltages; an amplifier, coupled to the multiplexer, adapted to receive the reference voltage selected by the multiplexer and set an offset voltage of the driver based on the reference voltage; a current source circuit, coupled to the amplifier, adapted to provide an output current for the driver; a plurality of transistors, coupled to the current source circuit and to a data line, adapted to route the output current to produce a positive voltage differential output or a negative voltage differential output based on a data value on the data line; and a current limiting circuit, coupled to the plurality of transistors, adapted to limit the output current to a value that provides a desired differential output voltage.
In accordance with another embodiment of the present invention, a driver includes means for selecting one of a plurality of offset voltages; means for providing a driver current to generate a positive differential voltage or a negative differential voltage based on a data signal; and means for selecting one of a plurality of values for the driver current to provide a desired differential voltage level for the positive differential voltage and the negative differential voltage.
In accordance with another embodiment of the present invention, a method of providing a plurality of low voltage differential signal levels from a single driver includes programming a desired offset voltage based on a plurality of selectable reference voltages; providing a programmable current source to generate a driver current; channeling the driver current to provide a positive differential output voltage or a negative differential output voltage based on a value of a data signal; and limiting the driver current to a specified value to provide a desired value for the positive differential output voltage and the negative differential output voltage.
The scope of the invention is defined by the claims, which are incorporated into this section by reference. A more complete understanding of embodiments of the present invention will be afforded to those skilled in the art, as well as a realization of additional advantages thereof, by a consideration of the following detailed description of one or more embodiments. Reference will be made to the appended sheets of drawings that will first be described briefly.


REFERENCES:
patent: 5920204 (1999-07-01), Bruno
patent: 6111431 (2000-08-01), Estrada
patent: 6366128 (2002-04-01), Ghia et al.
patent: 6504403 (2003-01-01), Bangs et al.
Andrea Boni et al., “LVDS I/O Interface for Gb/s-per-Pin Operation in 0.35-&mgr;m CMOS”, IEEE Journal of Solid-State Circuits, vol. 36, No. 4, Apr. 2001, pp. 706-711.

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