Low-voltage CMOS output buffer

Details Low-voltage CMOS output buffer Low-voltage CMOS output buffer

1989-06-28

1990-10-16

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307473, 307562, 307568, H03K 19094, H03K 1920, H03K 17687, H03K 19003

Patent

active

049637665

ABSTRACT:
A CMOS push-pull output buffer is powered by a low-voltage (e.g., +3.3 V) supply, but is able to withstand elevation of its output node to higher voltage without sinking large currents into the low-voltage supply. Thus, this buffer is able to operate tied to a bus that has various higher-voltage sources also operating on the bus. The P-channel pull-up transistor of this buffer has another P-channel transistor connecting its gate to the output node so that this gate will follow the voltage of the output node and thus keep the pull-up transistor from conducting from the output node to the power supply. The inverter which drives this gate of the P-channel pull-up transistor is also protected from reverse current into its low-voltage power supply by a series N-channel transistor which will exhibit body effect and is sized to present a significant resistance.

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