Low voltage balun circuit

Details Low voltage balun circuit Low voltage balun circuit

1999-12-15

2001-07-24

Tran, Toan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S065000

Reexamination Certificate

active

06265908

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to an analog integrated circuit; and, more particularly, to a balun circuit capable of operating at a low bias voltage.
DESCRIPTION OF THE PRIOR ART
A balun circuit is used in commercial applications such as cellular telephones, high definition television and other circuits, which receives a single-ended input signal to generate an amplified differential signal with 180° of phase difference. Such circuit should also operate at a low direct current (DC) voltage typically less than 3 volts. Balun circuits employed in devices utilizing batteries also require low DC power consumption to maximize battery life.
Referring to
FIG. 1
, there is shown an exemplary conventional balun circuit which includes load resistors R
L1
and R
L2
coupled to a supply voltage V
CC
and collectors of two NPN bipolar transistors Q
1
and Q
2
, respectively, a single-ended small-signal input voltage V
i
connected to the base of the bipolar transistor Q
1
, a bias current source I
BIAS
commonly coupled to both emitters of the bipolar transistors Q
1
and Q
2
, and a voltage source V
EE
coupled to the current source I
BIAS
, wherein the base of the bipolar transistor Q
2
is grounded.
In the circuit shown in
FIG. 1
, a differential output voltage V
o
is generated between the collectors of the bipolar transistors Q
1
and Q
2
. In such a circuit, however, an operating current value is fixed by the current source I
BIAS
, resulting in poor linearity of the circuit characteristics. Further, if an output impedance of the bias current source I
BIAS
is low, a symmetry characteristic of the output voltage signal becomes deteriorated, especially at high frequencies.
FIG. 2
shows another exemplary conventional balun circuit which further includes two NPN bipolar transistors Q
3
and Q
4
, a bias voltage V
BIAS
and a capacitor C
1
. In the circuit of
FIG. 2
, the collectors of the transistor Q
3
and Q
4
are connected to the resistors R
L1
and R
L2
and the emitters thereof are coupled to the collectors of the transistors Q
1
and Q
2
. The transistors Q
1
and Q
3
construct a cascode circuit. The capacitor C
1
positioned between the collector of the bipolar transistor Q
2
and the input voltage V
i
serves to block DC components from the input voltage V
i
. Coupled to the bases of transistors Q
3
and Q
4
is the bias voltage source V
BIAS
. Coupled to the bases of the transistors Q
1
and Q
2
is the bias current source I
BIAS
. At the transistor Q
2
, the base and the collector are diode-connected. Specifically, the bias voltage source V
BIAS
represents a bias circuit for providing enough voltage to activate the transistors Q
1
to Q
4
in a forward-active mode and small signal ground to the bases of the transistors Q
3
and Q
4
. The bias current source I
BIAS
represents a bias circuit for biasing the transistors Q
1
and Q
2
while imposing minimal loading effect thereon.
In the circuit shown in
FIG. 2
, the input transistors Q
1
and Q
4
function as class-AB amplifiers with the increasing input signal V
i
, resulting in improved linear characteristics over those of the circuit in FIG.
1
. The circuit of
FIG. 2
is also advantageous in that an improved symmetry characteristic can be obtained at high frequencies because it does not require the bias current source I
BIAS
connected to the emitters of the transistors Q
1
and Q
2
as in the circuit of FIG.
1
.
However, the conventional balun circuit shown in
FIG. 2
has a drawback in that it requires a substantially large supply voltage. In other words, the bias voltage V
BIAS
in the circuit of
FIG. 2
is to be set to 2*V
BE
, thereby limiting a lower bound of the supply voltage. For example, in case of a balun circuit incorporating therein GaAs hetro-junction bipolar transistors (HBTs), a bias voltage V
BIAS
is required to be about 3V. Such a balun circuit therefore may not be suitable to be used with a circuit having a supply voltage of 2V. Further, a DC value of the output voltage need be greater with increasing V
BIAS
, preventing direct coupling between the balun circuit and an external circuit to be connected thereto or causing the range of the output voltage to be reduced.
SUMMARY OF THE INVENTION
It is, therefore, a primary object of this invention to provide a balun circuit which is capable of operating at lower supply voltages.
In accordance with a preferred embodiment of the present invention, there is provided a balun circuit, comprising:
a set of a first load element, a first device and a second device connected in series in that order between a supply voltage source and the ground;
a set of second load element, a third device and a fourth device connected in series in that order between the supply voltage source and the ground, wherein each of the first to fourth devices has a control electrode and a first and a second electrodes, the first electrode of the first and the third devices being connected the second electrodes of the second and the fourth devices, respectively;
a bias voltage source connected to the control electrodes of the first and the third devices;
a bias current source connected to the control electrodes of the second and the fourth devices;
a first capacitor;
an input voltage source coupled to the second electrode of the second device via the first capacitor; and
a second capacitor coupled between the control electrode and the second electrode of the second device which is capable of operating at lower supply voltages.


REFERENCES:
patent: 5430337 (1995-07-01), Castella et al.
patent: 6011431 (2000-01-01), Gilbert
patent: 6069522 (2000-05-01), Venkatraman et al.
patent: 6100759 (2000-08-01), Sirna et al.

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