Low voltage amplification circuit with bias compensation

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control

Reexamination Certificate

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Details

C327S362000, C327S511000

Reexamination Certificate

active

06236254

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
This invention relates in general to circuits which include amplifiers and, more particularly, to a circuit which includes an amplifier with bias compensation.
BACKGROUND OF THE INVENTION
As technology has continued to advance, the need for smaller and faster circuitry has increased. In order to meet this need, circuits have been fabricated with smaller and smaller die sizes and etches. One result of the shift to smaller sizes has been an increase in concern with the ability of an integrated circuit to dissipate heat. The amount of heat which must be dissipated can be reduced by reducing the amount of heat generated. One method for reducing the heat generated by a particular integrated circuit is to decrease the supply voltage level with which the circuit works. In this regard, in the context of digital circuits, the industry is shifting from a 5 volt standard to a 3.3 volt standard, for example as reflected by the Low-Voltage Differential Signaling (LVDS) portion of an industry standard known as the TIA/EIA-644 standard.
One common portion of an integrated circuit is an amplifier circuit, which may be used in a variety of applications, such as televisions, radios, computers and stereo systems. In the context of digital circuits, certain digital circuits which include amplifiers are involved in the industry shift from 5 volts to 3.3 volts. Amplifier circuit designs have often included integrated bias compensation, in order to increase the effectiveness and accuracy of the amplifier. In particular, differential amplifiers often include integrated bias compensators in order to reduce the errors caused when, for example, low frequency monitor circuits pick off input voltages to the amplifier for comparison. Traditional designs of amplifiers with bias compensation are tailored for use with the traditional supply voltage of 5 volts or more. The trend toward lower voltages in integrated circuits has caused these traditional compensated amplifier designs to fail at the lower voltages. More specifically, at a supply voltage of about 3.3 volts, traditional amplifiers with bias compensation do not have sufficient voltage headroom to allow the amplifier to operate, because transistors for both the amplifier and the compensation circuit are coupled in series with each other between the supply voltage and ground, or between two different supply voltages. That is, the amplification and the compensation are both performed in a single stage. When the supply voltage is decreased, the transistors shut down as they run out of operating headroom, for example where wide variance in input common mode voltages are applied to the inputs of a differential amplifier and cause the transistors to lose compliance and shut down.
One traditional circuit of this type includes a pair of input resistors that feed a differential input voltage to respective voltage dividers, and from there to bases of a differential pair of amplifier transistors. If the bias currents into the bases of these two transistors are drawn through the input resistors, it contributes error to the function of the voltage divider. This error is traditionally avoided by coupling a differential pair of sensing transistors between a supply voltage and the collectors of the differential pair of amplifier transistors, in order to sense the currents through the amplifier transistors. Two sourcing transistors are each responsive to a respective sensing transistor, and each source the base current for a respective amplifier transistor. This allows the entire base current for each amplifier transistor to be supplied from the corresponding sourcing transistors, so that little or no current is drawn through the input resistors. While this arrangement has been satisfactory for use with a traditional supply voltage of 5 volts, it does not operate satisfactorily under all operational conditions with a reduced supply voltage of 3.3 volts. In particular, due to the sourcing transistors, the emitters of the sensing transistors operate two junction voltages below the supply voltage and, at 3.3 volts, the amplifier transistors do not have sufficient voltage headroom to operate properly over the desired input common mode range.
SUMMARY OF THE INVENTION
From the foregoing, it may be appreciated that a need has arisen for a method and apparatus in which an amplifier with bias compensation operates satisfactorily at a relatively low supply voltage.
According to one form of the present invention, an apparatus is provided to address this need, and includes: an input circuit having a first terminal and a second terminal, an input voltage being applied to the first terminal and a further voltage being generated at the second terminal, the further voltage being a function of the input voltage; an amplifier coupled to the second terminal of the input circuit and operable to output an amplified voltage, the amplified voltage being a function of the further voltage, the amplifier having a first current flowing therein which is proportional to the amplified voltage; a matcher coupled to the amplified voltage from the amplifier, the matcher being operable to generate a second current distinct from and proportional to the first current; and a compensator coupled to the matcher and responsive to the second current for generating a third current which is supplied to the second terminal of the input circuit, and which has a magnitude such that a current flow out of the input circuit through the second terminal is substantially zero and the input voltage is substantially equal to the further voltage.
Another form of the present invention involves a method of effecting compensation in a circuit that includes an input portion which responds to an input voltage applied to a first terminal by generating at a second terminal a further voltage which is a function of the input voltage, and that includes an amplifier coupled to the second terminal and operable to output an amplified voltage which is a function of the further voltage. The method includes: causing a first current to flow in the amplifier, the first current being proportional to the amplified voltage; generating in a matcher circuit coupled to the amplifier a second current which is distinct from and proportional to the first current; generating in a compensator coupled to the matcher a third current which is a function of the second current; and supplying the third current to the second terminal of the input circuit, the magnitude of the third current being such that a current flow out of the input circuit through the second terminal is substantially zero, so that the input voltage is substantially equal to the further voltage.


REFERENCES:
patent: 4687994 (1987-08-01), Fulkerson et al.
patent: 4883991 (1989-11-01), Kroner et al.
patent: 5260614 (1993-11-01), Theus et al.
patent: 5798664 (1998-08-01), Nagahori et al.
patent: 6005431 (1999-12-01), Mehr et al.

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