Semiconductor device manufacturing: process – Forming schottky junction – Compound semiconductor
Reexamination Certificate
2000-07-17
2003-05-27
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Forming schottky junction
Compound semiconductor
C438S653000, C438S627000, C438S648000, C438S685000, C438S614000, C438S618000
Reexamination Certificate
active
06569751
ABSTRACT:
FIELD
This invention relates to the field of integrated circuit processing. More particularly the invention relates to a system for reducing contact resistance between metallic interconnection layers in a via structure.
BACKGROUND
Vias are structures that are formed to enable electrical contact between different electrical interconnection layers in an integrated circuit. The via is typically formed in an insulating layer that is disposed between the two electrical interconnection layers, so that electrical contact only occurs at predetermined locations between the two electrical interconnection layers. The via is typically an etched hole that has a relatively high aspect ratio, meaning that it tends to be much deeper than it is wide. This is especially true as device geometries continually shrink.
Typically, a via is filled with a metallic electrical conduction system that makes contact between the underlying conduction layer disposed below the insulating layer in which the via is formed and the overlying conduction layer disposed above the insulating layer in which the via is formed. In a typical process, several different layers of metallic materials are used to fill the via. A thin titanium liner layer is first deposited as an adhesion layer and as a gettering layer. A thin titanium nitride liner layer is then deposited as a barrier layer to protect the underlying layers during subsequent processing. Finally, a tungsten plug is deposited to completely fill the via.
Because the via is a relatively small structure, it is important to reduce any electrical resistance created within the via by as great a degree as possible. One source of electrical resistance within the via is contact resistance between the metallic layers of the system as described above, such as can be caused by oxidation of the surfaces of the various layers. Oxidation of a layer tends to occur whenever the layer is exposed to the atmosphere, such as when it is transported from the chamber in which an underlying layer is deposited to the chamber in which an overlying layer is deposited. Oxidation is a particular problem with the titanium liner layer, which oxidizes very quickly in the presence of oxygen.
What is needed, therefore, is a system for reducing the contact resistance in a via by reducing the oxides that form on the titanium liner layer.
SUMMARY
The above and other needs are met by a method of forming a metallization interconnection system within a via. A first liner layer of titanium is deposited to a first thickness in the following manner. A substrate containing the via is placed within an ion metal plasma deposition chamber that contains a titanium target. The ion metal plasma deposition chamber is evacuated to a first base pressure. A first flow of argon is introduced to the ion metal plasma deposition chamber at a first deposition pressure. The substrate is biased to a first voltage. A plasma within the ion metal plasma deposition chamber is energized at a first power for a first length of time.
A second liner layer of Ti
x
N
y
is deposited to a second thickness on top of the first liner layer of titanium in the following manner. A first flow of nitrogen and a second flow of argon are introduced to the ion metal plasma deposition chamber at a second deposition pressure. The substrate is biased to a second voltage. The plasma within the ion metal plasma deposition chamber is energized at a second power for a second length of time, after which the substrate is removed from the ion metal plasma deposition chamber. Finally, a third liner layer of titanium nitride is deposited in a second deposition chamber, and a plug of tungsten is deposited.
Because the second liner layer of Ti
x
N
y
is deposited in the same chamber as the first liner layer of titanium, there is no opportunity for the first liner layer of titanium to oxidize to titanium oxide, which prevents the problems as described above. Further, because the Ti
x
N
y
is deposited using ion metal plasma deposition, there is no cusping at the top of the via structure, which further prevents the problems as described herein.
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Li Weidan
Tripathi Prabhakar P.
Wang Zhihai
LSI Logic Corporation
Luedeka Neely & Graham PC
Luu Chuong A.
Smith Matthew
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