Low temperature process for sharpening tapered silicon structure

Details Low temperature process for sharpening tapered silicon structure Low temperature process for sharpening tapered silicon structure

1998-10-06

2000-12-26

Bowers, Charles

Semiconductor device manufacturing: process

Electron emitter manufacture

445 24, H01L 2100

Patent

active

061658081

ABSTRACT:
A method of sharpening a tapered or pointed silicon structure, such as a silicon field emitter. The method includes oxidizing the silicon field emitter to form an oxide layer thereon and removing the oxide layer. Oxidizing occurs at a low temperature and forms a relatively thin (e.g., about 20 .ANG. to about 40 .ANG.) oxide layer on the silicon field emitter. The oxide layer may be removed by etching. The method may be employed to sharpen existing silicon structures or in fabricating tapered or pointed silicon structures. A silicon field emitter that has been sharpened or fabricated in accordance with the method is substantially free of crystalline defects and includes an emitter tip having a diameter as small as about 40 .ANG. to about 20 .ANG. or less.

REFERENCES:
patent: 5201992 (1993-04-01), Marcus et al.
patent: 5302238 (1994-04-01), Roe et al.
patent: 5329207 (1994-07-01), Cathey et al.
patent: 5358908 (1994-10-01), Reinberg et al.
patent: 5393647 (1995-02-01), Neukermans et al.
patent: 5438240 (1995-08-01), Cathey et al.
patent: 5620832 (1997-04-01), Sung et al.
patent: 5628661 (1997-05-01), Kim et al.
patent: 5632664 (1997-05-01), Scoggen et al.
patent: 5656886 (1997-08-01), Westphal et al.
patent: 5704820 (1998-01-01), Chandross et al.
patent: 5923948 (1999-07-01), Cathey, Jr.
Ohwaki et al., "Characterization of Silicon Native Oxide Formed in SC-1, H202 and Wet Ozone Processes", Jpn. J. Appl. Phys. vol. 36 Pt. 1, No. 9A, pp. 5507-5513, Sep. 1997.
Wolf & Tauber, Silicon Processing for the VLSI Era vol. 1: Process Technology, Lattice Press, pp. 209-210, 1986.
Ohwaki, T., et al.; Characterization of Silicon Native Oxide Formed in SC-1, H.sub.2 O.sub.2 and Wet Ozone Processes, Jpn. J. Appl. Phys. vol. 36 (1997) Pt. 1, No. 9A, pp. 5507-5513.
Ohmi, T., et al.; Native Oxide Growth and Organic Impurity Removal on Si Surface with Ozone-Injected Ultrapure Water, J. Electrochem. Soc., vol. 140, No. 3, Mar. 1993 .RTM. The Electrochemical Society, Inc., pp. 804-810.
Ohmi, T.; Very High Quality Thin Gate Oxide Formation Technology, J. Vac. Sci. Technol. A 13(3), May/Jun 1995, pp. 1665-1670.

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