Semiconductor device manufacturing: process – Electron emitter manufacture
Reexamination Certificate
2000-08-24
2002-08-27
Sherry, Michael J. (Department: 2829)
Semiconductor device manufacturing: process
Electron emitter manufacture
C445S050000
Reexamination Certificate
active
06440762
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a process of sharpening tapered silicon structures. Specifically, the present invention relates to a process that is useful for sharpening tapered silicon structures, such as field emitters, or field emission tips, on a substrate after circuit traces or other metal layers or structures have been formed on the substrate. The present invention also relates to a method of fabricating sharply pointed or tapered structures from substrates such as silicon wafer, silicon-on-insulator (SOI), silicon-on glass (SOG), and silicon-on-sapphire (SOS).
2. Background of Related Art
Tapered structures have long been employed as field emitters in electronic display devices. Due to the ever-improving electron emission characteristics of silicon field emitters, and since silicon field emitters are relatively inexpensive to fabricate, their use in electronic display devices is ever-increasing. The ability of silicon field emitters to emit electrons is partially dependent upon the sharpness of the tips, or apices, thereof. Sharply tipped field emitters require less energy than more bluntly tipped field emitters to achieve a desired degree of electron emission. Accordingly, the improvement of silicon field emitters is due, in part, to state of the art techniques for fabricating such structures, with which techniques field emitters of ever-increasing sharpness may be fabricated.
Conventional processes for fabricating silicon field emitters typically include a mask and etch of a substrate in order to define a silicon field emitter. The silicon field emitter may then be sharpened by thermal oxidation of an exposed surface of the silicon field emitter, which typically occurs at a temperature exceeding 900° C., and the subsequent removal of the oxide layer from the field emitter. Subsequently, associated structures may be fabricated on the substrate and assembled therewith in order to manufacture a field emission display device.
Many state of the art silicon field emitter fabrication processes, however, are somewhat undesirable in that some field emitter tips lack a desirable level of sharpness (i.e., are “blunt”), which typically increases the amount of voltage that is required in order for the field emitter to properly function.
The increased voltage requirements of blunt field emitters may cause them to fail to turn “on” or to “hardly turn ‘on’”. In order to function properly, field emitters that hardly turn “on” require a voltage that exceeds a desired, or “expecting”, operating voltage range. In contrast, properly functioning field emitters, which typically include sharp tips, turn “on”, and therefore function properly, when a voltage within the expecting voltage range is applied thereto. The failure of a field emitter to turn “on” within the expecting voltage range may result in the failure of a field emission display including such a field emitter. “Failed” field emission display devices are typically scrapped or discarded, which decreases product yield and results in increased production costs.
For the same reasons described above, the variable voltage requirements created by nonuniformities in the sharpness of the field emitters of a field emission display device may create brightness nonuniformities on a display screen that is illuminated thereby, even in devices which include silicon field emitters that turn “on” within the expecting voltage range. While sharper field emitters will brightly illuminate their corresponding areas of a display screen, areas of the display screen that are illuminated by blunter field emitters will be relatively dim. Thus, although a field emission display device which includes blunt field emitters may not fail production testing, sharpness nonuniformities may cause unacceptable brightness nonuniformities on a finished display screen.
Techniques for fabricating field emission displays with silicon emitters of substantially uniform sharpness typically include repetitive thermal oxidation of the exposed surface of the field emitters and the subsequent removal of the oxide layer from the field emitters. Due to the high temperatures that are typically utilized in such thermal oxidation processes, however, relatively thick oxide layers are formed on the field emitters. Thus, it may be difficult to control the sharpness of the tips of the field emitters.
An exemplary state of the art process for fabricating tapered silicon structures, such as silicon field emitters, is disclosed in U.S. Pat. No. 5,201,992 (the “'992 patent”), which issued to Robert B. Marcus et al. on Apr. 13, 1993. The process of the '992 patent includes defining protuberances by conventional mask and etch techniques and thermally oxidizing the exposed surface of each of the protuberances in a dry-oxygen environment at a temperature of between about 900° C. and 1050° C. The oxide layer is then removed from the protuberances by conventional etch techniques in order to define the tapered structures. Thermal oxidation may be repeated to enhance the sharpness of the apices of the tapered structures. Following sharpening of each of the tapered structures, the sharpness of the apices may subsequently be decreased by thermally oxidizing same in either a wet or dry oxygen environment at a temperature exceeding 1050° C.
While the process of the '992 patent fabricates tapered silicon structures with sharp apices, the process cannot be employed on finished structures which include tapered silicon structures, such as field emission display arrays including circuit traces or other metal structures thereon. Thus, the process of the '992 patent is not useful for reworking finished field emission display arrays in order to decrease failure rates thereof or otherwise improving such finished field emission display arrays.
Moreover, with reference to
FIG. 1
, the repeated thermal oxidation of silicon field emitters is somewhat undesirable from the standpoint that the typically high temperatures that are utilized in such oxidation processes may create crystalline defects, which are indicated by arrows, in the silicon field emitter, such as point, line (e.g., slip, straight dislocations, dislocation loops, etc.), area, volume, or other crystalline defects. These crystalline defects may also increase the voltage requirement of the silicon field emitter.
Many conventional thermal oxidation processes that are employed to fabricate tapered silicon structures are further undesirable from the standpoint that the oxide layers formed thereby are relatively thick (e.g., on the order of hundreds of angstroms). Thus, as such an oxide layer is subsequently removed from the silicon structure, it may be difficult to control the sharpness of the silicon structure. Such conventional thermal oxidation processes form thick oxide layers due, in part, to the small process windows of such processes. Many conventional thermal oxidation processes may also damage the substrate which underlies the sharpened silicon structure, such as the glass of silicon-onglass substrates that are typically employed in manufacturing displays that are larger than the currently available silicon wafers.
Conventionally, the failure rates of field emission display devices have been relatively high. Although field emitters of substantially uniform sharpness may be fabricated by some known processes, field emission display devices are typically not tested until after circuit traces and other metal structures associated therewith have been fabricated. Thus, conventional thermal oxidation processes cannot be employed to further sharpen silicon field emitters, as the high temperatures of such processes may damage any metal structures that have been fabricated on the substrate upon which the field emitters are located.
Thus, a process is needed for reworking failed and marginally functional silicon field emitters without introducing crystalline defects therein and without damaging the substrate or any circuitry associated with the silicon field emitters. A process for
Micro)n Technology, Inc.
Pert Evan
Sherry Michael J.
TraskBritt
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