Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching
Reexamination Certificate
1998-07-21
2001-01-16
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Chemical etching
Liquid phase etching
C438S637000, C438S648000, C438S746000, C438S754000
Reexamination Certificate
active
06174819
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method of manufacturing a semiconductor device comprising patterned metal interconnections. The invention has particular applicability in manufacturing high density semiconductor devices with submicron patterned metal features for local and global interconnections.
BACKGROUND ART
Current demands for high density and performance associated with ultra large scale integration require submicron features of about 0.25 microns and under, increased transistor and circuit speeds and improved reliability. Such demands for increased density, performance and reliability require device features with high precision and uniformity.
Conventional semiconductor devices comprise a substrate and various electrically isolated regions, called active regions, in which individual circuit components, such as transistors comprising gates and source/drain regions, are formed and interconnected. In one interconnection scheme, source/drain regions and gates of neighboring transistors are connected to one another by local interconnections to form “standard cells” which, in turn, are connected to each other locally and globally by several patterned metal layers interleaved with dielectric layers formed above and extending substantially horizontally with respect to the substrate surface. The metal layers are connected to one another and to the local interconnections by vias.
Conventional practices comprise depositing a composite three-layer metal stack comprising an upper layer of titanium nitride (TiN) or titanium—titanium nitride (Ti—TiN), an intermediate aluminum (Al) or Al alloy layer and a lower layer of titanium (Ti) or Ti—TiN, as by sputtering. A patterned photoresist mask is then formed on the metal layer defining a metal pattern and the underlying metal is etched to form the pattern of metal lines. The quality of the photoresist mask is crucial to the definition of the metal interconnect layer and, hence, to device performance. Thus, if defects are observed or detected in the mask, it must be removed and replaced with a defect free mask before etching. Conventional photoresist mask removal techniques include subjecting the wafer to oxygen plasma stripping at about 240° C. to about 260° C., followed by solvent cleaning. A new patterned photoresist mask is then formed on the underlying metal layer and etching is conducted to form the patterned metal lines.
After investigation, it was found that wafers which were processed by such conventional defective mask removal and replacement procedures exhibit an abnormally high defect density during the subsequent metal etch, due to the presence of residue in between the etched metal lines. The impact of stripping residue is illustrated in
FIG. 1
, depicting substrate
1
, field oxide
2
, device components
3
,
4
, local interconnect
5
, contacts
6
, insulating material
7
, metal lines
8
and residue R. It is believed that residue R forms a conductive bump on insulating material
7
which causes “bridging” between adjacent metal lines
8
and, hence, short circuiting and device failure. Some residue R can be formed even if the photoresist is not replaced; however, it was found that conventional photoresist mask replacement generates a considerably greater amount of conductive residue causing a high reject rate.
There exists a need for semiconductor methodology enabling replacement of a defective photoresist mask, then subsequently etching an underlying metal layer, without encountering short circuiting between resulting metal lines due to conductive residue. There exists a particular need for such photoresist mask rework methodology in manufacturing high density devices having minimal interwiring spaces.
SUMMARY OF THE INVENTION
An object of the present invention is a method of replacing a defective photoresist mask and etching to form a high integrity interconnection pattern.
Additional objects, advantages and other features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from the practice of the invention. The objects and advantages of the invention may be realized and obtained as particularly pointed out in the appended claims.
According to the present invention, the foregoing and other objects are achieved in part by a method of manufacturing a semiconductor device having metal interconnections, which method comprises substantially removing a defective photoresist mask having a pattern on a metal layer by applying a solvent thereto at a temperature of about 80° C. or less.
Another aspect of the present invention is a method of manufacturing a semiconductor device having metal interconnections on an upper surface, which method comprises: sputter depositing a titanium layer having a thickness of about 250 Å on the upper surface; sputter depositing a layer of an aluminum alloy containing about 1% copper having a thickness of about 4000 Å to about 8000 Å on the titanium layer; sputter depositing a titanium nitride layer having a thickness of about 500 Å or about 1100 Å on the aluminum alloy layer; forming a first photoresist mask having a pattern and having a thickness of about 1.0 &mgr;m to about 1.4 &mgr;m on the titanium nitride layer; detecting a defect on the first photoresist mask; substantially removing the first photoresist mask by applying a solvent thereto at a temperature of about 70° C. to about 80° C.; forming a second photoresist mask having the pattern at a thickness of about 1.0 &mgr;m to about 1.4 &mgr;m on the titanium nitride layer; and etching the titanium nitride, aluminum and titanium layers to form metal interconnections.
A still further aspect of the present invention is a method of manufacturing a semiconductor device having metal interconnections on an upper surface, which method comprises: removing a portion of a defective photoresist mask on a metal layer by oxygen plasma stripping at a temperature of about 150° C. or less leaving a remaining portion; and substantially removing the remaining portion of the defective photoresist mask by applying a solvent thereto at a temperature of about 80° C. or less.
Additional objects and advantages of the present invention will become readily apparent to those skilled in this art from the following detailed description, wherein only the preferred embodiment of the invention is shown and described, simply by way of illustration of the best mode contemplated for carrying out the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, all without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.
REFERENCES:
patent: 5795702 (1998-08-01), Tanabe et al.
patent: 6027861 (1998-08-01), Yu et al.
Sanderfer Anne E.
Shen Lewis
Shields Jeffrey Allan
Advanced Micro Devices , Inc.
Hoang Quoc
Nelms David
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