Fishing – trapping – and vermin destroying
Patent
1992-03-26
1993-11-30
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437101, 437247, 437 83, 437109, 148DIG1, 148DIG124, H01L 21365
Patent
active
052665046
ABSTRACT:
A method of manufacturing a bipolar transistor by use of low temperature emitter process is disclosed. After completion of the usual base and collector formation in a vertical bipolar transistor, an emitter opening is etched in the insulator layer over the base layer at selected locations. A thin layer (less than 500 .ANG.) of in-situ doped amorphous silicon is deposited over the substrate and heated to densify for 30 to 60 minutes at about 650.degree. C. Subsequently an in-situ doped polysilicon layer of 100 to 200 nm is deposited over the amorphous Si film preferably at about 600.degree. C. Subsequently the layers are heated below 600.degree. C. for several hours to convert partially the amorphous Si into a monocrystalline emitter layer over the base regions.
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Blouse Jeffrey L.
Chu Jack O.
Cunningham Brian
Gambino Jeffrey P.
Hsu Louis L.
Hearn Brian E.
Huberfeld Harold
International Business Machines - Corporation
Nguyen Tuan
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