Static information storage and retrieval – Interconnection arrangements – Magnetic
Reexamination Certificate
2001-11-13
2003-07-22
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Interconnection arrangements
Magnetic
C365S063000, C365S051000, C365S173000, C365S171000, C365S158000, C438S107000, C438S106000
Reexamination Certificate
active
06597597
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to the manufacture of electronic circuitry, and more particularly to methods and apparatuses for attaching magnetoresistive random access memory (MRAM) components to other components.
BACKGROUND
Magnetoresistive random access memory (MRAM) represents a new form of nonvolatile memory chip. Conventional forms of memory, such as, e.g., static RAM (SRAM), dynamic RAM (DRAM), electrically erasable programmable read only memory (EEPROM), are based on the storage of electrical charges in discrete circuit components. The presence of an electrical charge or the absence thereof can be used to represent binary data values (i.e., a “1” or a “0”). MRAM, however, is based on a different principle. MRAM uses the spin of an electron, rather than its charge, to indicate the presence of a 1 or a 0.
The MRAM magnetic stack tends to be sensitive to high temperatures. Unfortunately, high temperatures are typically reached during the attaching processes in the manufacture of similar conventional memory circuit components. Consequently, there is a need for new methods and apparatuses for use in the attaching processes while the manufacturing of components with MRAM circuitry.
SUMMARY
The above stated needs and others are met, for example, by a method for electrically coupling a magnetoresistive memory circuit component to a host component. The method includes keeping the temperature of the magnetoresistive memory circuit component below about 200° C. while aligning at least one interface feature of the magnetoresistive memory circuit component with at least one interface feature of the host component and electrically coupling the interface features using a z-axis conductive material. In certain exemplary implementations, the temperature of the magnetoresistive memory circuit component is further keep below about 180° C. It has been found that lower temperatures such as these eliminate the need to conduct additional costly MRAM annealing processes that re-set selected magnetic directions for materials within the MRAM.
REFERENCES:
patent: 5640343 (1997-06-01), Gallagher et al.
patent: 6163477 (2000-12-01), Tran
patent: 6205052 (2001-03-01), Slaughter et al.
Hewlett--Packard Company
Tran Andrew Q.
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