Low stress semiconductor wafer carrier and method of manufacture

Details Low stress semiconductor wafer carrier and method of manufacture Low stress semiconductor wafer carrier and method of manufacture

1976-05-19

1977-10-11

Kellogg, Arthur D.

Glass manufacturing

Processes

Fusion bonding of glass to a formed part

65 62, 29417, 432258, 432259, C03B 2320

Patent

active

040532941

ABSTRACT:
A semiconductor boat or carrier fabricated of stress relieved quartz bar having a rectangular cross section. The carrier has parallel elongate side bars and a parallel elongate lower bar, all of which are joined at the ends thereof by transverse lengths of quartz bar also having rectangular cross section. Spaced slots are formed in the inwardly facing edges of the elongate side and bottom bars so that groups of three slots, one in each bar, lie in parallel planes for receiving semiconductor wafers in three point contact in the carrier. End bars attached to and extending between the side bars and central bars extending between each of the side bars and the bottom bar are provided for obtaining rigidity in the carrier. These end and central bars are also rectangular in cross section. The method includes stress relieving a quartz billet, cutting the quartz billet into elongate quartz bars having rectangular cross section, welding the elongate bars in spaced parallel relation to form an open ended cradle and plunge cutting spaced slots simultaneously in both side bars and the bottom bar. Subsequent attachment of end bars extending between the ends of the side bars provides rigidity.

REFERENCES:
patent: 1999770 (1935-04-01), Littleton
patent: 3877134 (1975-04-01), Shanahan
patent: 3998333 (1976-12-01), Kamada

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