Static information storage and retrieval – Powering – Data preservation
Patent
1996-05-28
1997-09-23
Nguyen, Tan T.
Static information storage and retrieval
Powering
Data preservation
3652257, 365201, 36518906, 36518908, G11C 700
Patent
active
056711891
ABSTRACT:
A low power redundancy circuit that has applications in CMOS memories. This circuit employs fuses to select addressing paths and to provide address information of failing memory columns. Path selection is made by rendering a fuse device non-conductive which disconnects a clamping off bias that inhibits conduction through an N-channel transistor and preventing signal flow through the selected addressing paths to the output. Memory column addressing information is generated by selectively rendering a second set of fuses conductive or non-conductive to produce a logical one or zero respectively at the output of the addressing paths. A redundant signal is used to precondition the select circuitry and prevent a transient pulse from propagating through the output of the select circuitry when a section is not activated. The circuit uses CMOS N-channel transistors configured such as to produce low standby power while being able to deliver necessary output signals when path selection is made. Portions of the redundant circuit paths are shared with other paths to further minimize the use of power.
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Luo Jun-Wei
Rong Bor-Doou
Ting Tah-Kang Joseph
Ackerman Stephen B.
Etron Technology Inc.
Nguyen Tan T.
Saile George O.
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