Low-skew differential signal converter

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Output pulses having opposite polarities

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Details

327161, 327165, 327259, 327292, 327295, H03K 3017

Patent

active

058523782

ABSTRACT:
A low-skew single-ended to differential signal converter includes a conventional single-ended to differential converter that drives a pair of output driver circuits. Each driver circuit is formed from a pair of transfer gates that receive a supply voltage or a reference voltage, respectively. The transfer gates transfer only a portion of the supply or reference voltage in response to the inverted signal from the conventional converter. The portion of the transferred voltage is insufficient to trigger output members in the output drivers and the output voltages from the drivers do not transition in response to the noninverted signal. The inverted signal causes the outputs of the transfer gates to transition fully, triggering the respective output inverters. Because the inverted signal causes transitions of both of the output signals, skew of the output signals is reduced relative to skew of the inverted and noninverted signals.

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Satoru Tanoi, Member, IEEE, Tetsuya Tanabe, Kazuhiko Takahashi, Sanpei Miyamoto, and Masaru Uesugi "A 250-622 MHz Deskew and Jitter-Suppressed Clock Buffer Using Two-Loop Architecture", IEICE Trans, Electron, vol. E79 C. No. 7 Jul. 1996.
"Draft Standard for a High-Speed Memory Interface (SyncLink)", Microprocessor and Microcomputer Standards Subcommittee of the IEEE Computer Society, Copyright 1996 by the Institute of Electrical and Electronics Engineers, Inc., New York, NY, pp. 1-56.

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