Low signal loss bonding ply for multilayer circuit boards

Details Low signal loss bonding ply for multilayer circuit boards Low signal loss bonding ply for multilayer circuit boards

2003-05-29

2004-08-31

Lam, Cathy (Department: 1775)

Stock material or miscellaneous articles

Structurally defined web or sheet

Discontinuous or differential coating, impregnation or bond

C428S297400, C428S323000, C428S344000, C174S258000, C174S259000, C427S121000

Reexamination Certificate

active

06783841

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to a multilayer bonding prepreg comprising a fluoropolymer, a reinforcement typically consisting of fiberglass to reinforce the low signal loss fluoropolymer, a surface coated thermosetting resin and a ceramic dielectric modifier to control the coefficient of thermal expansion and reduce the resulting dissipation factor. This invention further relates to a bonding ply composition that has the ability to reform during lamination such that the PTFE-fiberglass layer has the ability to conform to the outline of copper circuitry, thus reducing the mass of thermosetting material required to fill circuitry. It has been unexpectedly found that one can influence the ability of the PTFE-fiberglass layer to conform around copper circuitry by designing a thermosetting adhesive composition of very low viscosity. Ceramic is used in either the fluoropolymer coated glass component, the thermosetting resin surface component, or in both components. The composite is used as a low signal loss bonding ply, Df<0.005, Dk<4.0, that can be pressed at low temperatures to manufacture a multilayer circuit board for high frequency applications. The invention also relates to a copper clad laminate that may comprise the following, a low loss prepreg (fluoropolymer-reinforcement-thermosetting resin), another low loss substrate (fluoropolymer-reinforcement), a reinforcement layer that may or may not contain a thermosetting resin, a film that may or may not contain fluorine.
BACKGROUND OF THE INVENTION
In the electronics industry multilayer circuit boards are prepared by bonding a layer of incompletely cured thermosetting resin reinforced with fiberglass between layers of a fully cured print and etched laminate. For a multilayer epoxy based circuit board, first an epoxy coated fiberglass composite is laminated with thin copper foil on both sides. The copper is patterned using conventional printed circuit board manufacturing processes. This layer is referred to as the inner layer. These innerlayer print and etched copper laminates are then bonded together typically using an FR-4 prepreg (a flame retarded partially cured sheet of epoxy coated fiberglass that has no copper foil cladding) using the partially cured epoxy as an adhesive layer by pressing the construction together in a press at temperatures such as 360° F. (182° C.) for two hours at 200 psi, thereby fully curing the epoxy FR-4 adhesive layer. A composite is thereby created having non-pattered copper layers at the surfaces and patterned inner layers being separated by the adhesive layer. The top and bottom non-patterned copper layers (the outer layers) can then be print and etched yielding a multilayer circuit board.
One drawback of using many conventional thermosetting resins as the adhesive layer is the poor electrical properties of the bonding adhesive layer. Epoxy based thermosetting resin, for example, has poor electrical loss characteristics in the 1-100 gigahertz range. For very long trace lengths, signal degradation forces the use of lower loss dielectrics. This is increasingly becoming the case for high speed digital applications (routers, backplanes, motherboards and daughter boards). For the RF and mm wave frequencies, polytetrafluoroethylene (PTFE) based materials are traditionally used to prevent signal loss. PTFE based materials have been available for a long time for the most demanding low signal loss applications but have been avoided for cost considerations. Conventional thermosetting resins have too high a loss tangent at the high frequencies and are nearing their ultimate limits at 2.5 GHz. As frequencies extend to the 5 and 10 GHz range, it is likely that epoxy resins will be replaced by higher performing materials. In the last 10 years epoxies were acceptable up to 2-3 GHz but seem to be being designed out as designs move to 5 GHz. Suppliers of epoxy laminate have been reducing the loss tangent of their products by switching to lower loss polyphenylene oxide based polymers and ceramic fillers. Typical fiberglass based PTFE products have 0.001-0.004 loss tangents, depending on fiberglass wt %, versus 0.007-0.014 for modified epoxies and related materials (10 GHz). As signal integrity drives the use of higher performing materials, epoxy based solutions will eventually fall short even with high loadings of ceramics or the addition of lower loss modifying resins.
The dielectric constant is less critical but it is desired to be below 4.0. At the high frequencies the market is largely driven by dissipation factor and the dielectric constant is taken for granted. Backpanels and daughter cards have been growing in the number of layers due to the need to eliminate crosstalk between circuitry. Lower dielectric constants lead to thinner dielectric spacings. By designing using lower and lower dielectric constant, the engineer can increase the number of layers yet not increase the total overall pwb thickness if the dielectric thickness of the individual layers can be reduced by using lower dielectric constant materials.
An alternative solution is the use of expanded PTFE that has been filled with epoxy and ceramic, thereby diluting the concentration of the higher loss epoxy component. This combination of epoxy, ceramic, and PTFE results in a sufficiently low loss product to be acceptable for high speed digital applications. The downside is that the expanded PTFE based solution is quite expensive and there are issues of dimensional movement that becomes significant with increasing layer count. U.S. Pat. Nos. 4,985,296; 4,996,097; 5,538,756; and 5,512,360 awarded to W. L. Gore describe the use of a thermosetting resin impregnated into an expanded PTFE web. These patents teach the use of incorporating ceramic in the PTFE expanded web manufacture and/or part of the non-fluorinated adhesive resin system to obtain low loss materials.
Ceramic filled resin systems based on polybutadiene-woven fiberglass based prepregs, both filled and unfilled with flame retardant additives, are known to be relatively low loss materials (U.S. Pat. No. 5,571,609). These materials suffer from the inconsistent quality of the peroxy cured rubber system and the poor bond strengths of the cured rubber to copper foil. A related material, crosslinked polyesters filled with kaolin, has attractive dielectric properties but unattractive peel strengths and other fabrication problems.
Polyphenylene oxide (PPO, APPE, PPE) based resin systems that are cured systems of low molecular weight PPO and epoxy resins have some process limitations (U.S. Pat. No. 5,043,367; 5,001,010; 5,162,450) for high-speed digital or high frequency applications. Their loss tangents in the gigahertz frequency range are reported to be in the 0.006-0.008 range. This is an improvement over standard epoxy but their lack of flow has led to their withdrawal from the marketplace.
Very low loss solutions include PTFE based materials and optical interconnects. Solutions containing pure PTFE based adhesive layers have the disadvantage that these materials need to be processed at temperatures exceeding 700° F. (fusion bonding, 371° C.). There are fabricators today building multilayer structures based on fluorinated resin systems. Most fabricators do not have equipment capable of pressing at these temperatures, nor are the extended heating and cooling attractive to fabricators. High temperature pressing on a 34-layer count stack up could result in decreased reliability of plated through holes, PCB warping, and copper pad distortion. In high speed digital applications, via holes and stubs are a real source of signal loss. The number one obstacle for high speed digital applications is the high layer count stack-up that encourages OEMs to source board materials that are process friendly. For high speed digital applications, the high frequency materials may be separated from the standard FR-4 lower frequency layers. This may lead to multiple lamination cycles. Fabricators prefer to press laminates relatively quickly at conventional epoxy pressing temperatures below 350°

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