Low resistance gallium arsenide field effect transistor

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357 15, 357 55, H01L 2980

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046511792

ABSTRACT:
A method of producing a high frequency III-V FET and the resultant structure is described wherein a doped layer is formed on a wafer of undoped, semi-insulating III-V material. The structure is then etched to form a mesa after which, a channel region is regrown from an exposed portion of the III-V substrate. The formation of the channel region defines the source and drain regions. Ohmic contacts are then made to the source and drain regions after which a Schottky contact is made to the channel region.

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