Semiconductor device manufacturing: process – Making passive device – Trench capacitor
Reexamination Certificate
2000-07-26
2001-07-10
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
Making passive device
Trench capacitor
C438S243000, C438S246000, C438S362000, 43, C257S061000, C257S301000, C257S304000, C257S516000
Reexamination Certificate
active
06258689
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the manufacture and design of trench capacitors for integrated circuit devices, especially capacitors for use in dynamic random access memory (DRAM) cells and advanced memory devices containing the same.
BACKGROUND OF THE INVENTION
Generally, a semiconductor memory device such as a dynamic random access memory (DRAM) cell comprises a plurality of memory cells which are used to store large quantities of information. Each memory cell typically includes a capacitor for storing electric charge and a field effect transistor (FET) for opening and closing charge and discharge passages of the capacitor. The number of cells (and corresponding bits of memory capacity) of DRAM integrated circuit chips has been increasing by approximately 4× every three years; this has been achieved by reducing memory cell size. Unfortunately, the smaller memory cell size also results in less area to fabricate the capacitor.
Moreover, as DRAM cell dimensions are scaled down with each successive generation, the cross-sectional area of the deep trench storage capacitor diminishes inversely with the square of the ground rule, while the trench depth has remained approximately constant. This change in trench geometry results in a large increase in the series resistance contributed by the polysilicon electrode contained within the deep trench. The increased series resistance, in turn, may adversely limit the speed at which the corresponding memory cell can be accessed.
One approach known in the prior art to decrease the series resistance of DRAM trench capacitors is to increase the doping concentration of the deep trench polysilicon. This approach however only provides a marginal reduction in series resistance and thus has limited applicability in fabricating DRAM cells of decreased dimension.
In view of the state of the prior art, there is a continued need for new manufacturing processes and/or designs which more effectively address the problem of series resistance in the context of trench capacitors and devices incorporating such capacitors, e.g. DRAM chips.
SUMMARY OF THE INVENTION
The present invention provides trench capacitor structures and methods of fabricating trench capacitors wherein the distributed series resistance of the deep trench electrode is substantially reduced for a given geometry.
The present invention also provides trench capacitor structures and methods of fabricating trench capacitors wherein the capacitance of the deep trench electrode is substantially increased for a given trench geometry.
The present invention further provides a trench capacitor structure which can be used in conventional DRAM memory cells as well as advanced memory cell devices.
In one aspect, the present invention encompasses a process wherein a metallic nitride liner is formed in the lower trench region of a deep trench capacitor. Specifically, the process of the present invention comprises:
(a) providing a semiconductor substrate having (i) a deep trench region therein, said deep trench having an upper region and a lower region, (ii) at least one pad layer formed on a surface of said semiconductor substrate, said pad layer being adjacent to said deep trench region, (iii) a first node electrode in said semiconductor substrate about said lower region of said deep trench, and (iv) a conformal node dielectric lining said deep trench at said first node electrode and overlying said pad layer;
(b) forming a layer of doped polysilicon on said node dielectric;
(c) forming a layer of a metallic nitride on said layer of doped polysilicon;
(d) planarizing the structure resulting from step (c) stopping at said pad layer;
(e) removing said node dielectric, said layer of doped polysilicon and said metallic nitride from a portion of said upper region of said deep trench to form a recess;
(f) filling said recess formed in step (e) with amorphous silicon; and
(g) planarizing said structure formed in step (f) stopping at said pad layer.
In one embodiment of the present invention, the deep trench is a bottle-shaped trench having a narrow upper region and a broad lower region. Such bottle-shaped trenches can be formed by an isotropic etch process which selectively removes material in the lower region of the deep trench but not the upper region of the deep trench.
Another aspect of the present invention relates to a deep trench capacitor structure having a metallic nitride in the lower region of the deep trench. It should be noted that the term “deep trench” is preferably used herein to denote a trench having a depth of from about 3 to about 10, more preferably 6-8, &mgr;m. The capacitor structure of the present invention comprises (a) a semiconductor substrate having a deep trench region therein; (b) a first node electrode in said semiconductor substrate about the exterior of said deep trench region; (c) a node dielectric layer lining said trench and covering said first node electrode; (d) a second node electrode comprising a layer of doped polysilicon conformal to an interior wall of said trench over said node dielectric and a layer of a metallic nitride material conformal to an interior wall of said doped polysilicon.
In a preferred embodiment of the present invention, the deep trench is a bottle-shaped trench having a narrow upper region and a broad lower region.
A further aspect of the present invention is directed to advanced memory cell devices which contain at least the DRAM cell structure of the present invention as one of its components.
These as well as other aspects of the present invention are described in greater detail below.
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Bronner Gary B.
Gambino Jeffrey P.
Mandelman Jack A.
Mohler Rick L.
Radens Carl
Capella, Esq. Steven
Elms Richard
International Business Machines - Corporation
Luu Pho
Scully Scott Murphy & Presser
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