Low resistance electrical interconnection for synchronous rectif

Details Low resistance electrical interconnection for synchronous rectif Low resistance electrical interconnection for synchronous rectif

1986-10-14

1988-08-23

Macon, Robert S.

357 41, H01L 2302

Patent

active

047664797

ABSTRACT:
A technique is disclosed for making the high current-carrying electrical interconnections to the power FET devices in a synchronous rectifier circuit with extremely low lead resistance. All such interconnections are made with solder and pliable copper straps instead of by conventional wire bonds.

REFERENCES:
patent: 3786375 (1974-01-01), Sato et al.
IEEE Transactions on Microwave Theory and Technique, vol. MTT-29, No. 12, Dec. 1981, C. T. Rucker et al.: "Chip Level Impatt Combining at 40 GHz" pp. 1266-1271.
Patent Abstracts of Japan, vol. 6, No. 67 (E-104)(945), 28 Apr. 1982, & JP, A 5710259 (Hitachi Seisakusho K.K.) 19 Jan. 1982.

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