Low resistance buried power bus for integrated circuits

Details Low resistance buried power bus for integrated circuits Low resistance buried power bus for integrated circuits

1982-07-30

1985-03-05

Larkins, William D.

357 2311, 357 42, 357 55, 357 65, H01L 2352, H01L 2704

Patent

active

045034516

ABSTRACT:
In a channel formed in one surface of a semiconductor substrate having a first conductivity, e.g. N type, a layer of material having a second conductivity type, e.g. P type boron, and a layer of relatively low resistance material such as Tungsten in contact with the first layer but insulated from the substrate. Second conductivity type tubs and the like can be formed adjacent the bus and in direct contact therewith through the first layer.

REFERENCES:
patent: 3913124 (1975-10-01), Roberson
patent: 4037306 (1977-07-01), Gutteridge et al.
patent: 4048649 (1977-09-01), Bohn
patent: 4140558 (1979-02-01), Murphy et al.
patent: 4280272 (1981-07-01), Egawa et al.
patent: 4329772 (1982-05-01), Oikawa et al.
patent: 4338618 (1982-07-01), Nishizawa
patent: 4339869 (1982-07-01), Reihl et al.
patent: 4369565 (1983-01-01), Muramatsu
patent: 4435896 (1984-03-01), Parrillo et al.

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